Richard Chi-Hsi Li has designed RF/RFIC circuits at Motorola and other companies for more than twenty years. He has also taught a training course entitled "RF/RFIC Circuit Design".

• PREFACE xiPART I INDIVIDUAL RF BLOCKS 11 LNA (LOW NOISE AMPLIFIER) 31.1 Introduction 31.2 Single-Ended Single Device LNA 41.3 Single-Ended Cascode LNA 411.4 LNA with AGC (Automatic Gain Control) 662 MIXERS 752.1 Introduction 752.2 Passive Mixers 782.3 Active Mixers 882.4 Design Schemes 993 DIFFERENTIAL PAIRS 1133.1 Why Differential Pairs? 1133.2 Can DC Offset be Blocked by a Capacitor? 1213.3 Fundamentals of Differential Pairs 1263.4 CMRR (Common Mode Rejection Ratio) 1384 RF BALUN 1554.1 Introduction 1554.2 Transformer Baluns 1584.3 LC Baluns 1814.4 Micro Strip Line Baluns 1914.5 Mixed Types of Baluns 1955 TUNABLE FILTERS 2195.1 Tunable Filters in Communication Systems 2195.2 Coupling Between Two Tank Circuits 2215.3 Circuit Description 2275.4 Effect of Second Coupling 2285.5 Performance 2326 VCO (VOLTAGE-CONTROLLED OSCILLATOR) 2376.1 "Three-Point" Type Oscillators 2376.2 Other Single-Ended Oscillators 2446.3 VCO and PLL 2496.4 Design Example of a Single-Ended VCO 2596.5 Differential VCO and Quad Phases VCO 2697 POWER AMPLIFIERS (PA) 2777.1 Classifications of Power Amplifiers 2777.2 Single-Ended PA Design 2837.3 Single-Ended PA-IC Design 2877.4 Push-Pull PA Design 2887.5 PA with Temperature Compensation 3127.6 PA with Output Power Control 3157.7 Linear PA 317PART II DESIGN TECHNOLOGIES AND SCHEMES 3238 DIFFERENT METHODOLOGY BETWEEN RF AND DIGITAL CIRCUIT DESIGN 3258.1 Controversy 3258.2 Differences between RF and Digital Blocks in a Communication System 3298.3 Conclusion 3328.4 Notes for High-Speed Digital Circuit Design 3329 VOLTAGE AND POWER TRANSPORTATION 3349.1 Voltage Delivered from a Source to a Load 3349.2 Power Delivered from a Source to a Load 3429.3 Impedance Conjugate Matching 3509.4 Additional Effects of Impedance Matching 36210 IMPEDANCE MATCHING IN NARROW-BAND CASE 37710.1 Introduction 37710.2 Impedance Matching by Means of Return Loss Adjustment 38010.3 Impedance Matching Network Built of One Part 38510.4 Impedance Matching Network Built of Two Parts 39110.5 Impedance Matching Network Built of Three Parts 40210.6 Impedance Matching When ZS or ZL Is Not 50 Ω 40810.7 Parts in an Impedance Matching Network 41311 IMPEDANCE MATCHING IN A WIDE-BAND CASE 44711.1 Appearance of Narrow- and Wide-Band Return Loss on a Smith Chart 44711.2 Impedance Variation Due to Insertion of One Part per Arm or per Branch 45311.3 Impedance Variation Due to the Insertion of Two Parts per Arm or per Branch 46211.4 Impedance Matching in IQ Modulator Design for a UWB System 46811.5 Discussion of Wide-band Impedance Matching Networks 49512 IMPEDANCE AND GAIN OF A RAW DEVICE 50112.1 Introduction 50112.2 Miller Effect 50312.3 Small Signal Model of a Bipolar Transistor 50712.4 Bipolar Transistor with CE (Common Emitter) Confi guration 51112.5 Bipolar Transistor with CB (Common Base) Confi guration 52612.6 Bipolar Transistor with CC (Common Collector) Confi guration 53912.7 Small Signal Model of a MOSFET Transistor 54712.8 Similarity between Bipolar and MOSFET Transistors 55212.9 MOSFET Transistor with CS (Common Source) Configuration 56312.10 MOSFET Transistor with CG (Common Gate) Configuration 57312.11 MOSFET Transistor with CD (Common Drain) Configuration 57912.12 Comparison of Bipolar and MOSFET Transistors in Various Configurations 58413 IMPEDANCE MEASUREMENT 58813.1 Introduction 58813.2 Scale and Vector Voltage Measurement 58913.3 Direct Impedance Measurement by Network Analyzer 59313.4 Alternative Impedance Measurement by Network Analyzer 60313.5 Impedance Measurement with the Assistance of a Circulator 60714 GROUNDING 61114.1 Implications of Grounding 61114.2 Possible Grounding Problems Hidden in a Schematic 61314.3 Imperfect or Inappropriate Grounding Examples 61414.4 "Zero" Capacitor 62014.5 Quarter Wavelength of Micro Strip Line 63215 EQUIPOTENTIALITY AND CURRENT COUPLING ON THE GROUND SURFACE 65115.1 Equipotentiality on the Ground Surface 65115.2 Forward and Return Current Coupling 66415.3 PCB or IC Chip with Multi-metallic Layers 67416 RFIC (RADIO FREQUENCY INTEGRATED CIRCUIT) AND SOC (SYSTEM ON CHIP) 68416.1 Interference and Isolation 68416.2 Shielding for an RF Module by a Metallic Shielding Box 68716.3 Strong Desirability to Develop RFIC 68816.4 Interference Going Along an IC Substrate Path 68916.5 Solution for Interference Coming from the Sky 69516.6 Common Grounding Rules for an RF Module and RFIC Design 69616.7 Bottlenecks in RFIC Design 69716.8 Prospect of SOC 70516.9 What Is Next? 70617 MANUFACTURABILITY OF PRODUCT DESIGN 71817.1 Introduction 71817.2 Implication of 6σ Design 72017.3 Approaching 6σ Design 72417.4 Monte Carlo Analysis 728PART III RF SYSTEM ANALYSIS 74318 MAIN PARAMETERS AND SYSTEM ANALYSIS IN RF CIRCUIT DESIGN 74518.1 Introduction 74518.2 Power Gain 74718.3 Noise 75818.4 Non-Linearity 77318.5 Other Parameters 80318.6 Example of RF System Analysis 804Appendices 807References 814INDEX 817

Richard Chi-Hsi Li has designed RF/RFIC circuits at Motorola and other companies for more than twenty years. He has also taught a training course entitled "RF/RFIC Circuit Design".

• PREFACE xiPART I INDIVIDUAL RF BLOCKS 11 LNA (LOW NOISE AMPLIFIER) 31.1 Introduction 31.2 Single-Ended Single Device LNA 41.3 Single-Ended Cascode LNA 411.4 LNA with AGC (Automatic Gain Control) 662 MIXERS 752.1 Introduction 752.2 Passive Mixers 782.3 Active Mixers 882.4 Design Schemes 993 DIFFERENTIAL PAIRS 1133.1 Why Differential Pairs? 1133.2 Can DC Offset be Blocked by a Capacitor? 1213.3 Fundamentals of Differential Pairs 1263.4 CMRR (Common Mode Rejection Ratio) 1384 RF BALUN 1554.1 Introduction 1554.2 Transformer Baluns 1584.3 LC Baluns 1814.4 Micro Strip Line Baluns 1914.5 Mixed Types of Baluns 1955 TUNABLE FILTERS 2195.1 Tunable Filters in Communication Systems 2195.2 Coupling Between Two Tank Circuits 2215.3 Circuit Description 2275.4 Effect of Second Coupling 2285.5 Performance 2326 VCO (VOLTAGE-CONTROLLED OSCILLATOR) 2376.1 "Three-Point" Type Oscillators 2376.2 Other Single-Ended Oscillators 2446.3 VCO and PLL 2496.4 Design Example of a Single-Ended VCO 2596.5 Differential VCO and Quad Phases VCO 2697 POWER AMPLIFIERS (PA) 2777.1 Classifications of Power Amplifiers 2777.2 Single-Ended PA Design 2837.3 Single-Ended PA-IC Design 2877.4 Push-Pull PA Design 2887.5 PA with Temperature Compensation 3127.6 PA with Output Power Control 3157.7 Linear PA 317PART II DESIGN TECHNOLOGIES AND SCHEMES 3238 DIFFERENT METHODOLOGY BETWEEN RF AND DIGITAL CIRCUIT DESIGN 3258.1 Controversy 3258.2 Differences between RF and Digital Blocks in a Communication System 3298.3 Conclusion 3328.4 Notes for High-Speed Digital Circuit Design 3329 VOLTAGE AND POWER TRANSPORTATION 3349.1 Voltage Delivered from a Source to a Load 3349.2 Power Delivered from a Source to a Load 3429.3 Impedance Conjugate Matching 3509.4 Additional Effects of Impedance Matching 36210 IMPEDANCE MATCHING IN NARROW-BAND CASE 37710.1 Introduction 37710.2 Impedance Matching by Means of Return Loss Adjustment 38010.3 Impedance Matching Network Built of One Part 38510.4 Impedance Matching Network Built of Two Parts 39110.5 Impedance Matching Network Built of Three Parts 40210.6 Impedance Matching When ZS or ZL Is Not 50 Ω 40810.7 Parts in an Impedance Matching Network 41311 IMPEDANCE MATCHING IN A WIDE-BAND CASE 44711.1 Appearance of Narrow- and Wide-Band Return Loss on a Smith Chart 44711.2 Impedance Variation Due to Insertion of One Part per Arm or per Branch 45311.3 Impedance Variation Due to the Insertion of Two Parts per Arm or per Branch 46211.4 Impedance Matching in IQ Modulator Design for a UWB System 46811.5 Discussion of Wide-band Impedance Matching Networks 49512 IMPEDANCE AND GAIN OF A RAW DEVICE 50112.1 Introduction 50112.2 Miller Effect 50312.3 Small Signal Model of a Bipolar Transistor 50712.4 Bipolar Transistor with CE (Common Emitter) Confi guration 51112.5 Bipolar Transistor with CB (Common Base) Confi guration 52612.6 Bipolar Transistor with CC (Common Collector) Confi guration 53912.7 Small Signal Model of a MOSFET Transistor 54712.8 Similarity between Bipolar and MOSFET Transistors 55212.9 MOSFET Transistor with CS (Common Source) Configuration 56312.10 MOSFET Transistor with CG (Common Gate) Configuration 57312.11 MOSFET Transistor with CD (Common Drain) Configuration 57912.12 Comparison of Bipolar and MOSFET Transistors in Various Configurations 58413 IMPEDANCE MEASUREMENT 58813.1 Introduction 58813.2 Scale and Vector Voltage Measurement 58913.3 Direct Impedance Measurement by Network Analyzer 59313.4 Alternative Impedance Measurement by Network Analyzer 60313.5 Impedance Measurement with the Assistance of a Circulator 60714 GROUNDING 61114.1 Implications of Grounding 61114.2 Possible Grounding Problems Hidden in a Schematic 61314.3 Imperfect or Inappropriate Grounding Examples 61414.4 "Zero" Capacitor 62014.5 Quarter Wavelength of Micro Strip Line 63215 EQUIPOTENTIALITY AND CURRENT COUPLING ON THE GROUND SURFACE 65115.1 Equipotentiality on the Ground Surface 65115.2 Forward and Return Current Coupling 66415.3 PCB or IC Chip with Multi-metallic Layers 67416 RFIC (RADIO FREQUENCY INTEGRATED CIRCUIT) AND SOC (SYSTEM ON CHIP) 68416.1 Interference and Isolation 68416.2 Shielding for an RF Module by a Metallic Shielding Box 68716.3 Strong Desirability to Develop RFIC 68816.4 Interference Going Along an IC Substrate Path 68916.5 Solution for Interference Coming from the Sky 69516.6 Common Grounding Rules for an RF Module and RFIC Design 69616.7 Bottlenecks in RFIC Design 69716.8 Prospect of SOC 70516.9 What Is Next? 70617 MANUFACTURABILITY OF PRODUCT DESIGN 71817.1 Introduction 71817.2 Implication of 6σ Design 72017.3 Approaching 6σ Design 72417.4 Monte Carlo Analysis 728PART III RF SYSTEM ANALYSIS 74318 MAIN PARAMETERS AND SYSTEM ANALYSIS IN RF CIRCUIT DESIGN 74518.1 Introduction 74518.2 Power Gain 74718.3 Noise 75818.4 Non-Linearity 77318.5 Other Parameters 80318.6 Example of RF System Analysis 804Appendices 807References 814INDEX 817

Richard Chi-Hsi Li has designed RF/RFIC circuits at Motorola and other companies for more than twenty years. He has also taught a training course entitled "RF/RFIC Circuit Design".

• PREFACE xiPART I INDIVIDUAL RF BLOCKS 11 LNA (LOW NOISE AMPLIFIER) 31.1 Introduction 31.2 Single-Ended Single Device LNA 41.3 Single-Ended Cascode LNA 411.4 LNA with AGC (Automatic Gain Control) 662 MIXERS 752.1 Introduction 752.2 Passive Mixers 782.3 Active Mixers 882.4 Design Schemes 993 DIFFERENTIAL PAIRS 1133.1 Why Differential Pairs? 1133.2 Can DC Offset be Blocked by a Capacitor? 1213.3 Fundamentals of Differential Pairs 1263.4 CMRR (Common Mode Rejection Ratio) 1384 RF BALUN 1554.1 Introduction 1554.2 Transformer Baluns 1584.3 LC Baluns 1814.4 Micro Strip Line Baluns 1914.5 Mixed Types of Baluns 1955 TUNABLE FILTERS 2195.1 Tunable Filters in Communication Systems 2195.2 Coupling Between Two Tank Circuits 2215.3 Circuit Description 2275.4 Effect of Second Coupling 2285.5 Performance 2326 VCO (VOLTAGE-CONTROLLED OSCILLATOR) 2376.1 "Three-Point" Type Oscillators 2376.2 Other Single-Ended Oscillators 2446.3 VCO and PLL 2496.4 Design Example of a Single-Ended VCO 2596.5 Differential VCO and Quad Phases VCO 2697 POWER AMPLIFIERS (PA) 2777.1 Classifications of Power Amplifiers 2777.2 Single-Ended PA Design 2837.3 Single-Ended PA-IC Design 2877.4 Push-Pull PA Design 2887.5 PA with Temperature Compensation 3127.6 PA with Output Power Control 3157.7 Linear PA 317PART II DESIGN TECHNOLOGIES AND SCHEMES 3238 DIFFERENT METHODOLOGY BETWEEN RF AND DIGITAL CIRCUIT DESIGN 3258.1 Controversy 3258.2 Differences between RF and Digital Blocks in a Communication System 3298.3 Conclusion 3328.4 Notes for High-Speed Digital Circuit Design 3329 VOLTAGE AND POWER TRANSPORTATION 3349.1 Voltage Delivered from a Source to a Load 3349.2 Power Delivered from a Source to a Load 3429.3 Impedance Conjugate Matching 3509.4 Additional Effects of Impedance Matching 36210 IMPEDANCE MATCHING IN NARROW-BAND CASE 37710.1 Introduction 37710.2 Impedance Matching by Means of Return Loss Adjustment 38010.3 Impedance Matching Network Built of One Part 38510.4 Impedance Matching Network Built of Two Parts 39110.5 Impedance Matching Network Built of Three Parts 40210.6 Impedance Matching When ZS or ZL Is Not 50 Ω 40810.7 Parts in an Impedance Matching Network 41311 IMPEDANCE MATCHING IN A WIDE-BAND CASE 44711.1 Appearance of Narrow- and Wide-Band Return Loss on a Smith Chart 44711.2 Impedance Variation Due to Insertion of One Part per Arm or per Branch 45311.3 Impedance Variation Due to the Insertion of Two Parts per Arm or per Branch 46211.4 Impedance Matching in IQ Modulator Design for a UWB System 46811.5 Discussion of Wide-band Impedance Matching Networks 49512 IMPEDANCE AND GAIN OF A RAW DEVICE 50112.1 Introduction 50112.2 Miller Effect 50312.3 Small Signal Model of a Bipolar Transistor 50712.4 Bipolar Transistor with CE (Common Emitter) Confi guration 51112.5 Bipolar Transistor with CB (Common Base) Confi guration 52612.6 Bipolar Transistor with CC (Common Collector) Confi guration 53912.7 Small Signal Model of a MOSFET Transistor 54712.8 Similarity between Bipolar and MOSFET Transistors 55212.9 MOSFET Transistor with CS (Common Source) Configuration 56312.10 MOSFET Transistor with CG (Common Gate) Configuration 57312.11 MOSFET Transistor with CD (Common Drain) Configuration 57912.12 Comparison of Bipolar and MOSFET Transistors in Various Configurations 58413 IMPEDANCE MEASUREMENT 58813.1 Introduction 58813.2 Scale and Vector Voltage Measurement 58913.3 Direct Impedance Measurement by Network Analyzer 59313.4 Alternative Impedance Measurement by Network Analyzer 60313.5 Impedance Measurement with the Assistance of a Circulator 60714 GROUNDING 61114.1 Implications of Grounding 61114.2 Possible Grounding Problems Hidden in a Schematic 61314.3 Imperfect or Inappropriate Grounding Examples 61414.4 "Zero" Capacitor 62014.5 Quarter Wavelength of Micro Strip Line 63215 EQUIPOTENTIALITY AND CURRENT COUPLING ON THE GROUND SURFACE 65115.1 Equipotentiality on the Ground Surface 65115.2 Forward and Return Current Coupling 66415.3 PCB or IC Chip with Multi-metallic Layers 67416 RFIC (RADIO FREQUENCY INTEGRATED CIRCUIT) AND SOC (SYSTEM ON CHIP) 68416.1 Interference and Isolation 68416.2 Shielding for an RF Module by a Metallic Shielding Box 68716.3 Strong Desirability to Develop RFIC 68816.4 Interference Going Along an IC Substrate Path 68916.5 Solution for Interference Coming from the Sky 69516.6 Common Grounding Rules for an RF Module and RFIC Design 69616.7 Bottlenecks in RFIC Design 69716.8 Prospect of SOC 70516.9 What Is Next? 70617 MANUFACTURABILITY OF PRODUCT DESIGN 71817.1 Introduction 71817.2 Implication of 6σ Design 72017.3 Approaching 6σ Design 72417.4 Monte Carlo Analysis 728PART III RF SYSTEM ANALYSIS 74318 MAIN PARAMETERS AND SYSTEM ANALYSIS IN RF CIRCUIT DESIGN 74518.1 Introduction 74518.2 Power Gain 74718.3 Noise 75818.4 Non-Linearity 77318.5 Other Parameters 80318.6 Example of RF System Analysis 804Appendices 807References 814INDEX 817