Robert K. Brayton – författare

Unknown Component Problem

Theory and Applications

Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics

Integrating Functional and Temporal Domains in Logic Design

The False Path Problem and Its Implications

Timed Boolean Functions

A Unified Formalism for Exact Timing Analysis

Logic Synthesis for Field-Programmable Gate Arrays

Synthesis of Finite State Machines

Functional Optimization

Synthesis of Finite State Machines

Logic Optimization

Logic Minimization Algorithms for VLSI Synthesis

Regular Fabrics in Deep Sub-Micron Integrated-Circuit Design

Synthesis of Finite State Machines

Functional Optimization

Logic Minimization Algorithms for VLSI Synthesis

Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics

Logic Synthesis for Field-Programmable Gate Arrays

Timed Boolean Functions

A Unified Formalism for Exact Timing Analysis

Integrating Functional and Temporal Domains in Logic Design

The False Path Problem and Its Implications

Synthesis of Finite State Machines

Logic Optimization

Regular Fabrics in Deep Sub-Micron Integrated-Circuit Design