Alberto L. Sangiovanni-Vincentelli - Böcker

Synchronous Equivalence

Formal Methods for Embedded Systems

Substrate Noise

Analysis and Optimization for IC Design

Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics

Function/Architecture Optimization and Co-Design of Embedded Systems

Steady-State Methods for Simulating Analog and Microwave Circuits

Algorithms for Synthesis and Testing of Asynchronous Circuits

Logic Synthesis for Field-Programmable Gate Arrays

Synthesis of Finite State Machines

Functional Optimization

Synthesis of Finite State Machines

Logic Optimization

Logic Minimization Algorithms for VLSI Synthesis

Relaxation Techniques for the Simulation of VLSI Circuits

Noise Analysis of Radio Frequency Circuits

Steady-State Methods for Simulating Analog and Microwave Circuits

Synthesis of Finite State Machines

Functional Optimization

Noise Analysis of Radio Frequency Circuits

Relaxation Techniques for the Simulation of VLSI Circuits

Logic Minimization Algorithms for VLSI Synthesis

Cross-Talk Noise Immune VLSI Design Using Regular Layout Fabrics

Synchronous Equivalence

Formal Methods for Embedded Systems

Logic Synthesis for Field-Programmable Gate Arrays

Algorithms for Synthesis and Testing of Asynchronous Circuits

Function/Architecture Optimization and Co-Design of Embedded Systems

Synthesis of Finite State Machines

Logic Optimization

Substrate Noise

Analysis and Optimization for IC Design

Hybrid Systems: Computation and Control

4th International Workshop, HSCC 2001 Rome, Italy, March 28-30, 2001 Proceedings

Design Systems for VLSI Circuits

Logic Synthesis and Silicon Compilation