José Monteiro – författare

Computer-Aided Design Techniques for Low Power Sequential Logic Circuits

Computer-Aided Design Techniques for Low Power Sequential Logic Circuits

VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things

25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23–25, 2017, Revised and Extended Selected Papers

VLSI-SoC: Opportunities and Challenges Beyond the Internet of Things

25th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2017, Abu Dhabi, United Arab Emirates, October 23–25, 2017, Revised and Extended Selected Papers

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation

18th International Workshop, PATMOS 2008, Lisbon, Portugal, September 10-12, 2008, Revised Selected Papers

Integrated Circuit and System Design: Power and Timing Modeling, Optimization and Simulation

19th International Workshop, PATMOS 2009, Delft, The Netherlands, September 9-11, 2009, Revised Selected Papers

Utilisation de différents types de couverture du sol

Computer Architecture: Digital Circuits To Microprocessors