Del i serien Materials, Circuits and Devices

VLSI Architectures for Future Video Coding

Inbunden, Engelska, 2019

2 279 kr

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This book addresses future video coding from the perspective of hardware implementation and architecture design, with particular focus on approximate computing and the energy-quality scalability paradigm. Challenges in deploying VLSI architectures for video coding are identified and potential solutions postulated with reference to recent research in the field. The book offers systematic coverage of the designs, techniques and paradigms that will most likely be exploited in the design of VLSI architectures for future video coding systems.Written by a team of expert authors from around the world, and brought together by an editor who is a recognised authority in the field, this book is a useful resource for academics and industry professionals working on VLSI implementation of video codecs.

Produktinformation

Utgivningsdatum2019-10-07
Mått156 x 234 x 23 mm
Vikt726 g
FormatInbunden
SpråkEngelska
SerieMaterials, Circuits and Devices
Antal sidor384
FörlagInstitution of Engineering and Technology
ISBN9781785617102

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Elektronik och kommunikationer inom Naturvetenskap och teknik

Maurizio Martina is an Associate Professor in the Electronics and Telecommunications Department at Politecnico di Torino, Italy. He conducts research in the field of VLSI architectures for multimedia signal processing and communications, particularly the design of image/video compression and iterative channel-code decoder architectures. He has published almost 100 papers in international journals and conferences. He is and has been in the technical program committee of several international conferences.

Chapter 1: Scalable transform architectures for video codingChapter 2: Joint algorithm-architecture design of video coding modulesChapter 3: High-throughput architectures for high-resolution video coding: system architecture analysisChapter 4: High-throughput architectures for high-resolution video coding: hardwired oriented algorithms and VLSI architecturesChapter 5: Low-power circuit design techniques for high-resolution video codingChapter 6: Real-time architectures for 3D video codingChapter 7: Frame memory compression for high-resolution video codingChapter 8: Discrete transform approximations for video codingChapter 9: Reconfigurable and approximate computing for video codingChapter 10: Future video coding: new tools and algorithms