Mohamed Abouelatta is a professor of microelectronics at Ain Shams University, Egypt. His fields of research include power devices, smart power ICs, photovoltaic and 3D heterogeneous integration.Ahmed Shaker is a professor of engineering physics at Ain Shams University, Egypt. His fields of research include power devices, and photovoltaic and tunneling FETs.Christian Gontrand is a professor at INL/INSA Lyon, France. He was formerly a head professor in the Smart Power Integration team at AMPERE lab and had the technical charge of the CIMIRLY from 1988 to 1996.

• Preface ixChapter 1. Overview of Smart Power Integration 11.1. Introduction 11.2. Smart PIC applications 21.2.1. Flat panel displays 41.2.2. Computer power supplies and disk drivers 41.2.3. Variable speed motor drives 41.2.4. Factory automation 41.2.5. Telecommunications 51.2.6. Appliance controls 51.2.7. Consumer electronics 51.2.8. Lighting controls 51.2.9. Smart homes 61.2.10. Aircraft electronics (Avionics) 61.2.11. Automotive electronics 61.3. Historical view of the MOS power devices 61.4. Smart PIC fabrication processes 91.4.1. Dedicated processes 91.4.2. Compatible processes 101.5. Insulation techniques 101.5.1. Self-insulation 101.5.2. Dielectric insulation 111.5.3. Junction insulation 111.5.4. Advanced junction insulation techniques 121.6. Motivation of the book 13Chapter 2. Modular or Hybrid Integration 172.1. Introduction 172.2. IGBT technology evolution 182.2.1. IGBT presentation 182.2.2. Epitaxial structure with buffer layer and reduction of carrier lifetime 302.2.3. Homogeneous structure with control of load injection 362.2.4. Silicon direct bonding-IGBT 382.2.5. IGBT trench 392.2.6. Lateral IGBT 392.3. Assembly technology 402.4. Thermal aspect 412.4.1. Thermal impedance 432.5. Applications fields 452.5.1. IGBT power modules for electric traction applications 452.5.2. IPM for low- and medium-power applications 48Chapter 3. Monolithic Integration 513.1. Functional integration and smart power 513.2. Transition from low-voltage technology (CMOS) to high voltage 523.2.1. Introduction 523.2.2. A typical CMOS technology 623.2.3. Breakdown voltage of a microelectronics structure 633.2.4. Improved junctions breakdown by guard techniques 683.2.5. Improvement using electrical insulation techniques 733.2.6. Review of the main MOS devices for high-voltage integrated circuits 753.3. Combining analog and digital (mixed) 823.3.1. Analog: basic functional blocks in CMOS technology and basic analog structures 823.3.2. Reminder on the general structure of the operational amplifier 883.3.3. Digital 963.3.4. The notion of codesign 963.3.5. Assessment 99Chapter 4. Technology for Simulating Power Integrated Systems 1014.1. Introduction 1014.2. Hardware and software design of engine control 1024.2.1. Functional specification 1054.2.2. Exploring the space of solutions: the partitioned specification model 1064.2.3. Mixed synthesis, hardware and software code 1074.2.4. Model functional testing 1104.2.5. Synthesis of the approach and related tools of the functional model 1114.3. Proposed design stream: related tools 1124.3.1. Accuracy 1134.3.2. Resources and system architecture 1134.3.3. Realization 1204.4. Conclusion 123Chapter 5. 3D Electrothermal Integration 1255.1. Introduction 1255.2. Electrothermal modeling of substrate 1265.2.1. Brief introduction to mathematical tools 1275.2.2. Simulation results by using Green/TLM 1325.2.3. Thermal management in a 3D-integrated figure 1465.2.4. Thermo-mechanical design 1565.2.5. Thermal modeling of the connectors 1575.3. Heat analysis for 3D ICs 1575.3.1. 3D IC heat transfer compact model without TSVs 1575.3.2. IC model for analyzing the temperature of the chip of the top layer taking into account the TSVs 1595.3.3. 3D IC thermal modeling result 1615.3.4. Electrothermal (ET) modeling of very large scale circuits 1665.3.5. Electrical modeling of very large scale 1675.3.6. Thermal modeling of very large scale circuits 1705.3.7. Electrothermal modeling of very large scale circuits 1715.4. Conclusion 1845.5. Heat pipe 1855.6. Conclusion 203Chapter 6. Substrate Coupling in Smart Power Integration 2056.1. Introduction 2056.2. Part I: smart power integration using the DTI technique 2056.2.1 DTI technology 2056.2.2 DTI structure 2066.2.3. LDMOSFET performance with DTI 2076.2.4. Parasitic suppression in 2D smart power ICs with deep trench 2116.2.5. HV dynamic signal impact on CMOS devices 2156.2.6. Mixed-mode CMOS-substrate coupling simulation 2276.3. Part II: smart power integration using stacked 3D technology 2326.3.1. From 2D planar integration to 3D integration 2326.3.2. 3D smart power integration 2346.3.3. TSV-CMOS mixed-mode coupling 2536.3.4. Electromagnetic impact of TSV in RF range 264Conclusion 271Appendix: Semiconductor Physical Models 275References 299Index 301