From Frequency to Time-Average-Frequency

Liming Xiu earned his B.S. and M.S. degrees in physics from Tsinghua University, Beijing, China, in 1986 and 1988, respectively.  Mr. Xiu earned his second M.S. degree in electrical engineering from Texas A&M University, College Station, in 1995. Currently, he is involved in an IC design startup. He has 16 granted and 9 pending US patents and has published numerous IEEE journal papers and two books: VLSI Circuit Design Methodology Demystified (Wiley-IEEE Press) and Nanometer Frequency Synthesis beyond Phase-Locked Loop (Wiley-IEEE Press). He served as vice president of IEEE Circuit and Systems Society in years 2009-2010.

• Foreword ixPreface xiAcknowledgment xvii1 Importance of Clock Signal in Modern Microelectronic Systems 11.1 Clock Technology: One of the Four Fundamental Technologies in IC Design 11.2 Clock Signal Generator: The Knowledge-and-Skill Gap between Its Creator and Its User 31.3 How Is Sense-of-Time Created in Electrical World? 51.4 All Microelectronic Systems Are Frequency Driven 91.5 A New Kid in Town: The Clock Architect 14References 152 Everything about the Clock 172.1 Clock Generation 172.2 Clock Distribution: Functional 182.3 Clock Distribution: Physical 192.4 Clock Usage: System Perspective 202.5 Clock Usage: Electrical Perspective 202.6 Clock Signal Quality 222.7 Clock Network Power Consumption 23References 233 A Different Way of Constructing a Clock Signal: Time-Average-Frequency 273.1 Motivation 273.2 Clock Is Trigger and Gatekeeper: Essence of Stage-by-Stage Operation 303.3 Time-Average-Frequency: Brief Review 323.4 Circuit Architecture of Time-Average-Frequency Direct Period Synthesis 343.5 The Two Long-Lasting Problems: Small Frequency Granularity and Fast Frequency Switching 373.6 Time-Average-Frequency and “Jittery” Clock 403.7 Frequency Switching and Waveform Establishment in TAF-DPS Clock Generator 433.8 Allan Variance of TAF-DPS Clock Signal 433.9 Behavior of TAF Clock Signal under the Scope of Jitter 463.10 Spectrum of TAF Clock Signal 523.11 Impact of Implementation Imperfection 52References 544 Time-Average-Frequency and Special Clocking Techniques: Gapped Clock Stretchable Clock and Pausible Clock 554.1 Gapped Clock and Synchronous FIFO 554.2 Stretchable Clock Pausible Clock and Asynchronous FIFO 594.3 Time-Average-Frequency Operation of Gapped Clock Stretchable Clock and Pausible Clock 61References 655 Microelectronic System Design in the Field of Time-Average-Frequency: A Paradigm Shift 675.1 Digital Data Communication in the Field of Frequency 695.2 Data Transfer in Time-Average-Frequency Field: Transmitting Clock Available 725.3 Data Transfer in Time-Average-Frequency Field: Clockless Transmission 745.4 Clock Data Recovery in Time-Average-Frequency Field 765.5 Network-on-Chip GALS Strategy in Time-Average-Frequency Field 825.6 Network Time Synchronization in Time-Average-Frequency Field: Improved Time Granularity and Frequency Granularity 895.7 Crystalless Reference and Time-Average-Frequency Driven VLSI System: Source for Frequency Reference 935.8 Crystalless Reference and Time-Average-Frequency Driven VLSI System: Harmony in System-Level Design 965.9 Efficient Implementation of MCXO System in Time-Average-Frequency Field 975.10 CPU Throttling in Time-Average-Frequency Field 1055.11 Spreading Clock Energy in Time-Average-Frequency Field 1085.12 TAF-DPS as Circuit Technique in Building Special Function Blocks 1145.12.1 TAF-DPS as DCO for PLL and DLL 1145.12.2 TAF-DPS as Open-Loop Fractional Divider 1175.12.3 TAF-DPS in Pulse Width Modulation 1205.12.4 TAF-DPS for Message Transmission Using Spectrum 1225.12.5 TAF-DPS for Message Transmission Using Duty Cycle 122References 1276 TAF-DPS Clock Generator and On-Chip Clock Distribution 1316.1 Global Clock Distribution at Low Frequency 1316.2 Resonant Clock Distribution Network Assisted by TAF-DPS 1366.3 TAF-DPS Clock Source and FPGA 1436.3.1 FPGA Operation and Flexibility 1446.3.2 Prefabricated FPGA Structure and Clock/Frequency Distribution Requirement 1446.3.3 Heterogeneous FPGA Computing and Frequency Requirement 1456.3.4 Parallelism in FPGA and Frequency Requirement 1456.3.5 TAF-DPS Clock Source and FPGA 1456.3.6 Creating Clock Source of Sub-ppm Frequency Granularity and Two-Cycle Frequency Switching Speed with FPGA Custom Logic 146References 1477 Digital-to-Frequency Converter: A Component Enabling New Application Fields 1498 Conclusion: Evolution of Timekeeper in Electrical World 155Index 157