DRAM Circuit Design

Brent Keeth is a Fellow in DRAM Design R&D at Micron Technology, Inc. His twenty-five years of industry experience spans radar systems, avionics components, communicationsystems, professional production and post-production equipment for the broadcast television industry, and solid-state memory. He holds over 400 U.S. and foreign granted or pending patents. R. Jacob Baker, PhD, is an engineer, educator, and inventor. He has more than twenty years of engineering experience and holds over 200 granted or pending patents in integrated circuit design. Dr. Baker is the author of several circuit design books. For a detailed biography, see http://cmosedu.com/jbaker/jbaker.htm.Brian Johnson is a Senior Design Engineer in DRAM Design R&D at Micron Technology, Inc. His research interests include asynchronous sequential circuits, clock synchronization circuits, and high-speed logic design. He holds over 60 granted or pending patents related to DRAM design and integrated circuit design.Feng Lin, PhD, is a Senior Design Engineer in DRAM Design R&D at Micron Technology, Inc. His research interests include high-speed I/O circuits, PLL/DLL, and mixed-signal circuit design. Dr. Lin holds over 50 granted or pending patents related to DRAM and integrated circuit design.

• Preface. Chapter 1. An Introduction to DRAM.Chapter 2. The DRAM Array.Chapter 3. Array Architectures.Chapter 4. The Peripheral Circuitry.Chapter 5. Global Circuitry and Considerations.Chapter 6. Voltage Converters.Chapter 7. An Introduction to High-Speed DRAM.Chapter 8. High-Speed Die Architectures.Chapter 9. Input Circuit Paths.Chapter 10. Output Circuit Paths.Chapter 11. Timing Circuits.Chapter 12. Control Logic Design.Chapter 13. Power Delivery.Chapter 14. Future Work in High-Performance Memory.Appendix.Glossary.Index.