José L. Ayala – författare

Communication Architectures for Systems-on-Chip

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation

21st International Workshop, PATMOS 2011, Madrid, Spain, September 26-29, 2011, Proceedings

VLSI-SoC: Forward-Looking Trends in IC and Systems Design

18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers

Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation

22nd International Workshop, PATMOS 2012, Newcastle upon Tyne, UK, September 4-6, 2012, Revised Selected Papers

VLSI-SoC: Forward-Looking Trends in IC and Systems Design

18th IFIP WG 10.5/IEEE International Conference on Very Large Scale Integration, VLSI-SoC 2010, Madrid, Spain, September 27-29, 2010, Revised Selected Papers