Heinrich Meyr - Böcker

Synchronization in Digital Communications, Volume 1

Phase-, Frequency-Locked Loops, and Amplitude Control

Digital Communication Receivers, Volume 2

Synchronization, Channel Estimation, and Signal Processing

Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms

Optimized ASIP Synthesis from Architecture Description Language Models

Architecture Exploration for Embedded Processors with LISA

Design of Energy-Efficient Application-Specific Instruction Set Processors

Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms

Language-driven Exploration and Implementation of Partially Re-configurable ASIPs

Architecture Exploration for Embedded Processors with LISA

Design of Energy-Efficient Application-Specific Instruction Set Processors

Integrated System-Level Modeling of Network-on-Chip enabled Multi-Processor Platforms

Optimized ASIP Synthesis from Architecture Description Language Models

Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms