FPGA Prototyping By Verilog Examples

Pong P. Chu, PhD, is Associate Professor in the Department of Electrical and Computer Engineering at Cleveland State University in Ohio. He has taught undergraduate– and graduate–level digital systems and computer architecture courses for more than a decade and has received instructional grants from the National Science Foundation and Cleveland State University.

• Preface. Acknowledgments. PART I. BASIC DIGITAL CIRCUITS. 1. Gate–level combinational circuit. 2. Overview of FPGA and EDA software. 3. RT–level combinational circuit. 4. Regular Sequential Circuit. 5. FSM. 6. FSMD. 7. Selected Topics of Verilog. PART II. I/O MODULES. 8. UART. 9. PS2 Keyboard. 10. PS2 Mouse. 11. External SRAM. 12. Xilinx Spartan–3 Specific Memory. 13. VGA controller I: graphic. 14. VGA controller II: text. PART III. PICOBLAZE MICROCONTROLLERXILINX SPECIFIC. 15. PicoBlaze Overview. 16. PicoBlaze Assembly Code Development. 17. PicoBlaze I/O Interface. 18. PicoBlaze Interrupt Interface. Appendix A: Sample Verilog templates. References. Topic Index.

Chu (Cleveland State University) has written several volumes covering Verilog and VHDL, the two major hardware definition languages used in the design of smaller digital systems. The volume reviewed here is an introduction to Verilog only. The book assumes that the student is already familiar with basic digital circuits. After an introductory section, the remainder of the work consists of worked examples that should be quite easily understood by students. Each chapter ends with suggested exercises that build directly on the examples from that chapter. There are sections that are specific to Xilinx Spartan FPGAs and in some cases, specific to the Digilent S3 prototyping board. A course that uses different hardware would need to provide supplementary material before using this book as a resource. Chu writes in a pedagogically sound manner and includes good coverage of the Verilog language, with nice attention to the differences between the 1995 and 2001 versions of the language. The volume suffers from some sloppy editing (e.g., a reference to VHDL instead of Verilog in one place, an incorrect timing parameter value in the appendix, miscellaneous typos) and a very skimpy index. Summing Up : Recommended. Upper-division undergraduate through professional collections. -- C. Vickery, Queens College of CUNY ( Choice, February 2009)