FPGA Prototyping by VHDL Examples

PONG P. CHU, PhD is Associate Professor in the Department of Electrical Engineering and Computer Science at Cleveland State University, Cleveland, Ohio. He has taught undergraduate and graduate digital systems and computer architecture courses for more than two decades, and has received multiple instructional grants from the National Science Foundation.

• Preface ixAcknowledgments xvPART I BASIC  DIGITAL  CIRCUITS DEVELOPMENT1 Gate-level Combinational Circuit 11.1 Overview of VHDL 11.2 General description 21.3 Structural description 61.4 Top-level  signal mapping 81.5 Testbench 91.6 Bibliographic notes 111.7 Suggested experiments 112 Overview of FPGA and EDA  software 132.1 FPGA 132.2 Overview of the Digilent Nexys  4 DDR    board 152.3 Development flow 162.4 Xilinx  Vivado  Design  Suite 182.5 Bibliographic notes 182.6 Suggested experiments 183 RT-level combinational circuit 233.1 RT-level components 233.2 Routing circuit with concurrent assignment   statements 293.3 Modeling with a  process 343.4 Routing circuit with if and case    statements 363.5 Constants and generics 413.6 Replicated structure 443.7 Design examples 463.8 Bibliographic notes 583.9 Suggested experiments 584 Regular Sequential Circuit 614.1 Introduction 614.2 HDL code of the FF and  register 644.3 Simple design examples 674.4 Testbench for sequential circuits 724.5 Case study 754.6 Timing  and clocking 874.7 Bibliographic notes 904.8 Suggested experiments 905 FSM  935.1 Introduction 935.2 FSM code development 975.3 Design examples 1005.4 Bibliographic notes 1105.5 Suggested experiments 1106 FSMD 1136.1 Introduction 1136.2 Code development of an FSMD 1196.3 Design examples 1256.4 Bibliographic notes 1406.5 Suggested experiments 1417 RAM and Buffer of FPGA 1457.1 Embedded memory of FPGA device 1457.2 General description for RAM-like   component  1477.3 FIFO buffer  1537.4 HDL templates for memory  inference  1587.5 Overview of memory controller  1647.6 Bibliographic notes  1667.7 Suggested experiments  166PART II EMBEDDED SOC I: VANILLA  FPRO SYSTEM8 Overview of Embedded SoC Systems 1718.1 Embedded  SoC 1718.2 Development Flow of Embedded   SoC 1738.3 FPro  SoC Platform 1768.4 Adaption  on  Digilent  Nexys  4  DDR board 1808.5 Portability 1828.6 Organization 1848.7 Bibliographic notes 1849 Bare Metal System Software Development 1879.1 Bare metal system development overview 1879.2 Memory-mapped  I/O 1899.3 Direct  I/O  Register Access 1919.4 Robust  I/O  Register Access 1939.5 Techniques for low-level I/O  operations 1979.6 Device Drivers 1999.7 FPro  Utility  Routines  and  Directory Structure 2049.8 Test program 2089.9 Bibliographic notes 2119.10 Suggested experiments 21110 FPro Bus Protocol and MMIO Slot Specification 21310.1 FPro Bus 21310.2 Interface with bus 21610.3 MMIO I/O core 22210.4 Timer core development 22610.5 MMIO controller 22910.6 MCS I/O bus and bridge 23410.7 Vanilla FPRO System Construction 23810.8 Bibliographic notes 24010.9 Suggested experiments 24011 UART Core 24311.1 Introduction 24311.2 UART Construction 24511.3 UART core  development 25311.4 UART driver 25611.5   Additional  Project Ideas 26211.6 Bibliographic notes 26511.7 Suggested experiments 266PART III EMBEDDED SOC II: BASIC I/O CORES12 Xilinx XADC Core 27112.1 Overview of XADC 27112.2 XADC core development 27312.3 XADC core device driver 27812.4 Sampler FPro System 28112.5 Additional Project Ideas 29112.6 Bibliographic notes 29212.7 Suggested experiments 29213 Pulse Width Modulation Core 29513.1 Introduction 29513.2 PWM Design 29613.3 PWM core development 29913.4 PWM  driver 30213.5 Testing 30313.6 Project ideas 30413.7 Suggested experiments 30514 Debouncing  core and LED-Mux  Core 30714.1 Debouncing Core 30714.2 LED-Mux   Core 31314.3 Project  Ideas 31914.4 Suggested Experiments 32015 SPI Core 32315.1 Overview 32315.3 SPI  Core Development  33315.4 SPI Driver  33615.5 Test  33815.6 Project Ideas  34115.7 Bibliographic notes  34215.8 Suggested Experiments  34216 I2C Core 34716.1 Overview 34716.2 I2C Controller 35016.3 I2C Core Development 36016.4 I2C  Driver 36116.5 Test 36516.6 Project  Idea 36616.7 Bibliographic notes 36716.8 Suggested experiments 36717 PS2 Core 37117.1 Introduction 37117.2 PS2 Controller 37317.3 PS2 core development 38317.4 PS2 driver 38417.5 Test 39317.6 Bibliographic notes 39417.7 Suggested experiments 39418 Sound I: DDFS  Core 39718.1 Introduction 39718.2 Design and implementation 39718.3 Fixed-point arithmetic 40018.4 DDFS Construction 40218.5 DAC (digital-to-analog converter) 40418.6 DDFS core development 40718.7 DDFS driver 40918.8 Testing 41218.9 Bibliographic notes 41318.10 Suggested experiments 41319 Sound II: ADSR Core 41519.1 Introduction 41519.2 ADSR envelope generator 41619.3 ADSR core development 42119.4 ADRS driver 42319.5 Testing 42919.6 Project  Idea 43019.7 Bibliographic notes 43119.8 Suggested experiments 431PART IV EMBEDDED SOC III: VIDEO  CORES20 Introduction to Video System 43520.1 Introduction to a video  display 43520.2 Stream interface 43720.3 VGA Synchronization 43920.4 Bar  test-pattern generator 44820.5 Color-to-grayscale conversion circuit 44920.6 Demo video system 45120.7 Advanced video standards 45220.8 Bibliographic notes 45320.9 Suggested experiments 45421 FPro Video Subsystem 45721.1 Organization of video subsystem 45721.2 FPro video IP core 46121.3 Example video cores 46621.4 FPro video synchronization core 47021.5 Daisy video subsystem 47921.6 Vanilla daisy FPro system 48621.7 Video driver and testing program 49021.8 Bibliographic notes 49321.9 Suggested experiments 49322 Sprite Core 49722.1 Introduction 49722.2 Basic design 49822.3 Mouse pointer core 50022.4 “Ghost” character core 50522.5 Sprite core driver and testing program 51322.6 Bibliographic notes 51622.7 Suggested experiments 51623 On-Screen-Display Core 51923.1 Introduction to tile graphics 51923.2 Basic OSD design 52123.3 OSD core  52423.4 OSD core driver and testing   program  53023.5 Bibliographic notes  53223.6 Suggested experiments  53224 VGA  Frame  Buffer Core 53524.1 Overview 53524.2 Frame buffer core 53624.3 Register map 54024.4 Driver and testing program 542 54324.5 Project Ideas 54524.6 Bibliographic notes 54724.7 Suggested experiments 547PART V EPILOGUE25  What Next 553References 557Appendix A: Tutorials 561A.1 Overview of Xilinx Vivado  IDE 561A.2 Short tutorial on Vivado hardware   development 565A.3 Short tutorial on Vivado   simulation 570A.4 Tutorial on IP instantiation 574A.5 Short tutorial on FPro system   development 580A.6 Bibliographic notes 587Topic Index 589