Offset Reduction Techniques in High-Speed Analog-to-Digital Converters

Analysis, Design and Tradeoffs

Inbunden, Engelska, 2009

Av Pedro M. Figueiredo, João C. Vital, Pedro M Figueiredo, João C Vital

2 489 kr

Beställningsvara. Skickas inom 10-15 vardagar

Fri frakt för medlemmar vid köp för minst 249 kr.

Finns i fler format (1)

Häftad

2 479 kr

Skickas inom 10-15 vardagar

Offset Reduction Techniques in High-Speed Analog-to-Digital Converters analyzes, describes the design, and presents test results of Analog-to-Digital Converters (ADCs) employing the three main high-speed architectures: flash, two-step flash and folding and interpolation. The advantages and limitations of each one are reviewed, and the techniques employed to improve their performance are discussed.

Produktinformation

Utgivningsdatum2009-03-09
Mått155 x 235 x 35 mm
Vikt721 g
FormatInbunden
SpråkEngelska
SerieAnalog Circuits and Signal Processing
Antal sidor382
Upplaga2009
FörlagSpringer-Verlag New York Inc.
ISBN9781402097157

Tillhör följande kategorier

Elektronik och kommunikationer inom Naturvetenskap och teknik

Pedro Figueiredo received the degrees of Licenciado and Doutor (PhD) in Electrical and Computer Engineering in 1999 and 2006, respectively, from the Instituto Superior Técnico (IST), Lisbon, Portugal. From 1997 to 1999, he was with the Analog and Mixed-Mode Circuits Group in the Institute for Systems and Computer Engineering (INESC), Lisbon, Portugal, where he worked on low-noise logic families and high-speed Analog-to-Digital Converters.In 1999, he joined Chipidea - Microelectrónica, where he currently leads the group responsible for the design of Analog-to-Digital Converters. His main research interests are in the area of analog and mixed-signal circuits, with emphasis on high-speed data conversion and design automation. He has 10 publications in international journals and conferences.João Vital received the degrees of Licenciado, Mestre and Doutor (PhD) in Electrical and Computer Engineering in 1986, 1990 and 1994, respectively, all from the Instituto Superior Técnico (IST), Lisboa, Portugal. He is a Co-founder of Chipidea - Microelectronica in 1997, and currently serves as Vice-President of Data Conversion, leading the Data Conversion Solutions Division of Chipidea to provide competitive solutions towards the demanding markets of Broadband Wireless Communications and Video. His main scientific interests are in the area of analog and mixed-signal integrated-circuit design, with a focus on data conversion. He developed research work in the University of Pavia, Italy, in the University of California - Los Angeles, USA, and in the Oregon State University, USA, also in 1990. He has over 50 publications in international journals, book chapters and conferences and is a co-holder of an European and US Patent filed by British Telecom.

Preface. List of Symbols and Abbreviations. 1 High-Speed ADC Architectures. 2 Averaging Technique - DC Analysis and Termination. 3 Averaging Technique - Transient Analysis and Automated Design. 4 Integrated Prototypes Using Averaging. 5 Offset Cancellation Methods. 6 Conclusions. Appendix A: Averaging With Piecewise Linear Differential Pairs. Appendix B: Mismatches In The Resistors Of The Aveaging Network. Appendix C Averaging In Folding Stages. References. Index.