Nanomagnetic and Spintronic Devices for Energy-Efficient Memory and Computing

Professor Supriyo Bandyopadhyay, Virginia Commonwealth University, Virginia, USASupriyo Bandyopadhyay is Commonwealth Professor of Electrical and Computer Engineering at Virginia Commonwealth University where he directs the Quantum Device Laboratory. Prof. Bandyopadhyay has authored and co-authored over 300 research publications and he is currently a member of the editorial board of seven international journals. He is the current Chair of the Institute of Electrical and Electronics Engineers (IEEE) Technical Committee on Spintronics (Nanotechnology Council), and past-chair of the Technical Committee on Compound Semiconductor Devices and Circuits (Electron Device Society). He has been an IEEE Electron Device Society Distinguished Lecturer and served as a Vice President of the IEEE Nanotechnology Council. Prof. Bandyopadhyay is a Fellow of the Institute of Electrical and Electronics Engineers, the Institute of Physics, American Physical Society, the Electrochemical Society and the American Association for the Advancement of Science.Professor Jayasimha Atulasimha, Virginia Commonwealth University, Virginia, USAJayasimha Atulasimha is Qimonda Associate Professor of Mechanical and Nuclear Engineering with a courtesy appointment in Electrical and Computer Engineering at the Virginia Commonwealth University, where he directs the Magnetism, Magnetic Materials and Magnetic Devices (M3) laboratory. He has authored or coauthored over 60 scientific articles including more than 40 journal publications on magnetostrictive materials, magnetization dynamics, and nanomagnetic computing and has given several invited talks at conferences, workshops and universities in the USA and abroad on these topics. His research interests include nanomagnetism, spintronics, magnetostrictive materials and nanomagnet-based computing devices. He received the NSF CAREER Award for2013–2018. He currently serves on the Technical Committees for Spintronics, IEEE Nanotechnology Council, ASME Adaptive Structures and Material Systems, Device Research Conference (DRC), and as a Focus Topic organizer for the APS topical group on magnetism (GMAG). He is a member of ASME, APS and an IEEE Senior Member.

• About the Editors and Acknowledgments xi List of Contributors xiiiForeword xviiPreface xix1 Introduction to Spintronic and Nanomagnetic Computing Devices 1Jayasimha Atulasimha and Supriyo Bandyopadhyay1.1 Spintronic Devices 11.2 Nanomagnetic Devices 31.2.1 Use of Spin Torque to Switch Nanomagnets 61.2.2 Other Methodologies for Switching Nanomagnets 61.3 Thinking beyond Traditional Boolean Logic 7References 72 Potential Applications of all Electric Spin Valves Made of Asymmetrically Biased Quantum Point Contacts 9Nikhil Bhandari, Maitreya Dutta, James Charles, Junjun Wan, Marc Cahay, and S.T Herbert2.1 Introduction 92.2 Quantum Point Contacts 112.3 Spin Orbit Coupling 142.3.1 Rashba SOC (RSOC) 152.3.2 Dresselhaus SOC (DSOC) 152.3.3 Lateral Spin-Orbit Coupling (LSOC) 162.4 Importance of Spin Relaxation in 1D Channels 182.5 Observation of a 0.5 Conductance Plateau in Asymmetrically Biased QPCs in the Presence of LSOC 202.5.1 Early Experimental Results Using InAs QPCs 202.5.2 NEGF Conductance Calculations 202.5.3 Spin Texture Associated with Conductance Anomalies in QPCs 232.5.4 Prospect for Generation of Spin Polarized Current at Higher Temperature 252.5.5 Observation of Other Anomalous Conductance Plateaus in an Asymmetrically Biased InAs/In0.52 Al0.48 as QPCs 262.6 Intrinsic Bistability near Conductance Anomalies 272.6.1 Experimental Results 282.6.2 NEGF Simulations 302.7 QPC Structures with Four In-plane SGs: Toward an All Electrical Spin Valve 432.7.1 Preliminary Results on Four-gate QPCs 432.7.2 Experiments 462.7.3 Onset of Hysteresis and Negative Resistance Region 502.8 Future Work 562.9 Summary 58Acknowledgments 60References 603 Spin-Transistor Technology for Spintronics/CMOS Hybrid Logic Circuits and Systems 65Satoshi Sugahara, Yusuke Shuto, and Shuu’ichirou Yamamoto3.1 Spin-Transistor and Pseudo-Spin-Transistor 653.1.1 Spin – MOSFET 663.1.2 Pseudo-Spin-MOSFET 693.2 Energy-Efficient Logic Applications of Spin-Transistors 723.2.1 Power Gating with Nonvolatile Retention 733.2.2 Nonvolatile Bistable Circuits 753.2.3 Break-even Time 763.3 Nonvolatile SRAM Technology 783.3.1 Static Noise Margin of Nonvolatile SRAM 793.3.2 Energy Performance of NV-SRAM 813.4 Application of Nonvolatile Bistable Circuits for Memory Systems 86References 884 Spin Transfer Torque: A Multiscale Picture 91Yunkun Xie, Ivan Rungger, Kamaram Munira, Maria Stamenova, Stefano Sanvito, and Avik W. Ghosh4.1 Introduction 914.1.1 Background 914.1.2 STT Modeling: An Integrated Approach 934.2 The Physics of Spin Transfer Torque 944.2.1 Free-Electron Model for Magnetic Tunnel Junction 964.3 First Principles Evaluation of TMR and STT 1024.3.1 The TMR Effect in the MgO Barrier 1044.3.2 Currents and Torques in NEGF 1144.3.3 First Principles Results on Spin Transfer Torque 1164.4 Magnetization Dynamics 1194.4.1 Landau-Lifshitz-Gilbert Equation 1194.4.2 Spin Torque Switching in Presence of Thermal Fluctuations 1214.4.3 Including Thermal Fluctuations: Stochastic LLG vs Fokker Planck 1224.5 Summary: Multiscaling from Atomic Structure to Error Rate 125Acknowledgments 129References 1295 Magnetic Tunnel Junction Based Integrated Logics and Computational Circuits 133Jian-Ping Wang, Mahdi Jamali, Angeline Klemm Smith, and Zhengyang Zhao5.1 Introduction 1335.2 GMR Based Field Programmable Devices 1345.3 MTJ Based Field Programmable Devices 1365.3.1 MTJ Structure and TMR Ratio 1365.3.2 MTJ Based Magneto-Logic 1375.3.3 Utilization of STT in MTJ Based Magneto-Logic 1445.4 Information Transformation between Gates 1455.4.1 Direct Communication Using Charge Current 1465.4.2 Magnetic Domain Walls for Information Transferring 1485.5 MTJ Based Logic-in-Memory Devices 1485.6 Magnetic Quantum Cellular Automata 1495.6.1 Introduction and Background 1495.6.2 Experimental Demonstrations 1505.7 All-Spin Based Magnetic Logic 1555.7.1 Nonlocal Lateral Spin Valve Background 1555.7.2 Critical Parameters for Operation 1555.7.3 Selected Review of Experimental Demonstrations 1565.7.4 Applications to All-Spin Logic Devices 1585.8 Summary 161Acknowledgment 161References 1626 Magnetization Switching and Domain Wall Motion Due to Spin Orbit Torque 165Debanjan Bhowmik, OukJae Lee, Long You, and Sayeef Salahuddin6.1 Introduction 1656.2 Theory 1666.2.1 Rashba Effect 1686.2.2 Spin Hall Effect 1696.3 Magnetic Switching Driven by Spin Orbit Torque 1716.4 Domain Wall Motion Driven by Spin Orbit Torque 1766.5 Applications of Spin Orbit Torque 1846.6 Conclusion 186References 1867 Magnonic Logic Devices 189Alexander Khitun and Alexander Kozhanov7.1 Introduction 1897.2 Magnonic Logic Devices 1977.3 Spin Wave-Based Logic Gates and Architectures 2067.4 Discussion and Summary 212References 2168 Strain Mediated Magnetoelectric Memory 221N. Tiercelin, Y. Dusch, S. Giordano, A. Klimov, V. Preobrazhensky, and P. Pernod8.1 Introduction 2218.2 Concept of Unequivocal Strain- or Stress-Switched Nanomagnetic Memory 2238.2.1 Magnetic Configuration and Equilibrium Positions 2238.2.2 Quasi-Static Stress-Mediated Switching 2258.3 LLG Simulations – Macrospin Model 2268.3.1 Landau-Lifshitz-Gilbert Equation and Effective Magnetic Field 2268.3.2 Memory Parameters 2278.3.3 Results of the Macrospin Model 2288.4 LLG Simulations – Eshelby Approach 2318.4.1 Geometry of the Memory Element 2328.4.2 Coupling with the External Magnetic Field 2338.4.3 Coupling with the External Electric Field and Elastic Stress 2348.4.4 Static Behavior of the System 2348.4.5 Dynamic Behavior of the System 2358.5 Stochastic Error Analysis 2388.5.1 Statistical Mechanics of Magnetization in a Single-Domain Particle 2388.5.2 Switching Process within the Magnetoelectric Memory 2438.6 Preliminary Experimental Results 2488.6.1 Piezoelectric Actuator with in-Plane Polarization 2488.6.2 Ferroelectric Relaxors with out-of-Plane Polarization 2498.6.3 Magnetoelastic Switching in a Magneto-Resistive Structure 2508.7 Conclusions 250Acknowledgments 252References 2539 Hybrid Spintronics-Strainronics 259Ayan K. Biswas, Noel D’Souza, Supriyo Bandyopadhyay, and Jayasimha Atulasimha9.1 Introduction 2599.1.1 Nanomagnetic Memory and Logic Devices: The Problem of Energy Dissipation in the Clocking Circuit 2609.1.2 Switching Nanomagnets with Strain Could Drastically Reduce Energy Dissipation: Hybrid Spintronics-Straintronics Overview 2619.1.3 Landau Lifshitz Gilbert (LLG) Equation 2639.2 Nanomagnetic Memory Switched with Strain 2659.2.1 Complete Magnetization Reversal (180◦ Switching): Complex out-of-Plane Dynamics 2659.2.2 Switching the Magnetization between Two Mutually Perpendicular Stable Orientations and Extension to Stable Orientations with Angular Separation >90◦ 2689.2.3 Complete 180◦ Switching with Stress Alone 2699.2.4 Mixed Mode Switching of Magnetization by 180◦: Acoustically Assisted Spin Transfer Torque (STT) Switching for Nonvolatile Memory 2739.3 Straintronic Clocking of Nanomagnetic Logic 2769.3.1 Two-State Dipole Coupled Nanomagnetic Logic 2769.3.2 Four-state Multiferroic Nanomagnetic Logic (NML) 2799.3.3 Switching Error in Dipole Coupled Nanomagnetic Logic (NML) 2839.3.4 Straintronic Nanomagnetic Logic Devices (NML) 2849.4 Summary and Conclusions 286References 28610 Unconventional Nanocomputing with Physical Wave Interference Functions 291Santosh Khasanvis, Mostafizur Rahman, Prasad Shabadi, and Csaba Andras Moritz10.1 Overview 29110.2 Spin Waves Physical Layer for WIF Implementation 29310.2.1 Physical Fabric Components 29510.3 Elementary WIF Operators for Logic 29810.4 Binary WIF Logic Design 30310.4.1 Binary WIF Full Adder 30310.4.2 Parallel Counters 30610.4.3 Benchmarking Binary WIF Circuits vs. CMOS 30910.4.4 WIF Topology Exploration 31010.5 Multivalued WIF Logic Design 31110.5.1 Multivalued Operators and Implementation Using WIF 31210.5.2 Multivalued Arithmetic Circuit Example: Quaternary Full Adder 31610.5.3 Benchmarking of WIF Multivalued Circuits vs. Conventional CMOS 31810.5.4 Input/Output Logic for Data Conversion between Binary and Radix-r Domains 31910.6 Microprocessors with WIF: Opportunities and Challenges 32010.7 Summary and Future Work 326References 326Index 329A color plate section falls between pages 44 and 45

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