Intellectual Property Protection in VLSI Designs

The development and implementation of intellectual property (IP) protection mechanisms is important for the emerging reuse-based system design methodology. This book provides an overview of the security problems in modern VLSI design with a detailed treatment of a constraint-based protection paradigm for the protection of VLSI design IPs from FPGA design to standard-cell placement, from high-level synthesis solutions to gate-level netlist place-and-rout, and from advanced CAD tools to physical design algorithms. The problem of VLSI design IP protection is much more challenging than the protection of multimedia contents or software, and the protection paradigm is also conceptually different from the state-of-the-art approaches in those domains. The key idea in this IP protection paradigm is to superimpose additional constraints that correspond to an encrypted signature of the designer to design/software in such a way that quality of design is only nominally impacted, while strong proof of authorship is guaranteed. It consists of three integrated parts: constrain-based watermarking, fingerprinting, and copy detection. Its correctness relies on the presence of all these components.In short, watermarking aims to embed signatures for the identification of the IP owner without altering the IP's functionality; fingerprinting seeks to provide effective ways to distinguish each individual IP user to protect legal IP buyers; copy detection is the method to trace improper use of the IP and demonstrate IP's ownership.