High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip

Häftad, Engelska, 2018

Av Zheng Wang, Anupam Chattopadhyay

1 409 kr

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This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliability estimation as well as architecture-level and system-level fault tolerant designs. It also presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures.

Produktinformation

  • Utgivningsdatum2018-05-12
  • Mått155 x 235 x 13 mm
  • Vikt341 g
  • FormatHäftad
  • SpråkEngelska
  • SerieComputer Architecture and Design Methodologies
  • Antal sidor197
  • FörlagSpringer Verlag, Singapore
  • ISBN9789811093210

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