Del i serien Materials, Circuits and Devices

Functionality-Enhanced Devices

An alternative to Moore's Law

Inbunden, Engelska, 2019

AvPierre-Emmanuel, Gaillardon,Pierre-Emmanuel Gaillardon

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This book discusses one possible solution to the key issue in electronics engineering - the approaching limits of CMOS scaling - by taking advantage of the tendency of Schottky contacts to form at channel interfaces in nanoscale devices. Rather than suppressing this phenomenon, a functionality-enhanced device exploits it to increase switching functionality. These devices are Multiple-Independent-Gate-Field-Effect-Transistors, and other related nanoscale devices, whose polarity is electrostatically controllable. The functionality enhancement of these devices increases computational performance (function) per unit area and leads to circuits with better density, performance and energy efficiency.The book provides thorough and systematic coverage of enhanced-functionality devices and their use in proof-of-concept circuits and architectures. The theory and materials science behind these devices are addressed in detail, and various experimental fabrication techniques are explored. In addition, the potential applications of functionality-enhanced devices are outlined with a specific emphasis on circuit design, design automation and benchmarking.

Produktinformation

Utgivningsdatum2019-01-23
Mått156 x 234 x 23 mm
Vikt635 g
FormatInbunden
SpråkEngelska
SerieMaterials, Circuits and Devices
Antal sidor344
FörlagInstitution of Engineering and Technology
ISBN9781785615580

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Elektronik och kommunikationer inom Naturvetenskap och teknik

Pierre-Emmanuel Gaillardon is an Assistant Professor in the Electrical and Computer Engineering Department and an adjunct assistant professor in the School of Computing at The University of Utah, Salt Lake City, USA where he leads the Laboratory for NanoIntegrated Systems (LNIS). Professor Gaillardon is recipient of the BSF 2017 Prof. Pazy Memorial Research Award, the 2018 NSF CAREER award in functionality-enhanced transistors and the 2018 IEEE CEDA Pederson Award.

Chapter 1: Introduction to functionality-enhanced devicesPart I: Materials and device research related to functionality-enhanced devicesChapter 2: Germanium-based polarity-controllable transistorsChapter 3: Two-dimensional materials for functionality-enhanced devicesChapter 4: Wse2 polarity-controllable devicesChapter 5: Carrier type control of MX2 type 2D materials for functionality-enhanced transistorsChapter 6: Three-independent gate FET's super steep subthreshold slopeChapter 7: Super sensitive terahertz detectors Part II: Applications and design techniques of functionality-enhanced devicesChapter 8: CNT and SiNW modeling for dual-gate ambipolar logic circuit designChapter 9: Physical design of polarity controllable transistorsChapter 10: BCB benchmarking for three-independent-gate field effect transistorsChapter 11: Exploratory logic synthesis for multiple independent gate FETsChapter 12: Ultrafine grain FPGAs with polarity controllable transistorsChapter 13: Tunnel FET-based security primitive design