Won Y. Yang, PhD, is an Emeritus Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Jaekwon Kim, PhD, is a Professor in the Department of Computer & Telecommunications Engineering at Yonsei University in Wonju, Korea. Kyung W. Park, PhD, is a Managerial Researcher at Korea Electronics Technology Institute, Seoul, Korea. Donghyun Baek, PHD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Sungjoon Lim, PhD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Jingon Joung, PhD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Suhyun Park, PhD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Han L. Lee, PhD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Woo June Choi, PhD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Taeho Im, PhD, is a Professor in Oceanic IT Engineering at Hoseo University in Asan, Korea.

• Preface xiiiAbout the Companion Website xv1 Load Line Analysis and Fourier Series 11.1 Load Line Analysis 11.1.1 Load Line Analysis of a Nonlinear Resistor Circuit 31.1.2 Load Line Analysis of a Nonlinear RL circuit 71.2 Voltage-Current Source Transformation 101.3 Thevenin/Norton Equivalent Circuits 111.4 Miller’s Theorem 181.5 Fourier Series 181.5.1 Computation of Fourier Coefficients Using Symmetry 201.5.2 Circuit Analysis Using Fourier Series 291.5.3 RMS Value and Distortion Factor of a Non-Sinusoidal Periodic Signal 35Problems 362 Diode Circuits 432.1 The v-i Characteristic of Diodes 432.1.1 Large-Signal Diode Model for Switching Operations 442.1.2 Small-Signal Diode Model for Amplifying Operations 442.2 Analysis/Simulation of Diode Circuits 462.2.1 Examples of Diode Circuits 462.2.2 Clipper/Clamper Circuits 512.2.3 Half-wave Rectifier 532.2.4 Half-wave Rectifier with Capacitor – Peak Rectifier 532.2.5 Full-wave Rectifier 572.2.6 Full-wave Rectifier with LC Filter 592.2.7 Precision Rectifiers 622.2.7.1 Improved Precision Half-wave Rectifier 632.2.7.2 Precision Full-wave Rectifier 652.2.8 Small-Signal (AC) Analysis of Diode Circuits 672.3 Zender Diodes 75Problems 853 BJT Circuits 1053.1 BJT (Bipolar Junction Transistor) 1063.1.1 Ebers-Moll Representation of BJT 1063.1.2 Operation Modes (Regions) of BJT 1093.1.3 Parameters of BJT 1093.1.4 Common-Base Configuration 1113.1.5 Common-Emitter Configuration 1133.1.6 Large-Signal (DC) Model of BJT 1153.1.7 Small-Signal (AC) Model of BJT 1423.1.8 Analysis of BJT Circuits 1433.1.9 BJT Current Mirror 1563.1.10 BJT Inverter/Switch 1613.1.11 Emitter-Coupled Differential Pair 1653.2 BJT Amplifier Circuits 1683.2.1 Common-Emitter (CE) Amplifier 1693.2.2 Common-Collector (CC) Amplifier (Emitter Follower) 1733.2.3 Common-Base (CB) Amplifier 1803.2.4 Multistage Cascaded BJT Amplifier 1873.2.5 Composite/Compound Multi-Stage BJT Amplifier 1993.3 Logic Gates Using Diodes/Transistors[C-3, M-1] 2093.3.1 DTL NAND Gate 2093.3.2 TTL NAND Gate 2153.3.2.1 Basic TTL NAND Gate Using Two BJTs 2153.3.2.2 TTL NAND Gate Using Three BJTs 2183.3.2.3 Totem-Pole Output Stage 2223.3.2.4 Open-Collector Output and Tristate Output 2273.3.3 ECL (Emitter-Coupled Logic) OR/NOR Gate 2293.4 Design of BJT Amplifier 2393.4.1 Design of CE Amplifier with Specified Voltage Gain 2323.4.2 Design of CC Amplifier (Emitter Follower) with Specified Input Resistance 2393.5 BJT Amplifier Frequency Response 2433.5.1 CE Amplifier 2433.5.2 CC Amplifier (Emitter Follower) 2483.5.3 CB Amplifier 2553.6 BJT Inverter Time Response 259Problems 2664 FET Circuits 3034.1 Field-Effect Transistor (FET) 3034.1.1 JFET (Junction FET) 3044.1.2 MOSFET (Metal-Oxide-Semiconductor FET) 3134.1.3 MOSFET Used as a Resistor 3274.1.4 FET Current Mirror 3284.1.5 MOSFET Inverter 3384.1.5.1 NMOS Inverter Using an Enhancement NMOS as a Load 3424.1.5.2 NMOS Inverter Using a Depletion NMOS as a Load 3474.1.5.3 CMOS Inverter 3504.1.6 Source-Coupled Differential Pair 3554.1.7 CMOS Logic Circuits 3594.2 FET Amplifer 3604.2.1 Common-Source (CS) Amplifier 3624.2.2 CD Amplifier (Source Follower) 3664.2.3 Common-Gate (CG) Amplifier 3704.2.4 Common-Source (CS) Amplifier with FET Load 3734.2.4.1 CS Amplifier with an Enhancement FET Load 3734.2.4.2 CS Amplifier with a Depletion FET Load 3764.2.5 Multistage FET Amplifiers 3804.3 Design of FET Amplifier 3984.3.1 Design of CS Amplifier 3984.3.2 Design of CD Amplifier 4054.4 FET Amplifier Frequency Response 4094.4.1 CS Amplifier 4104.4.2 CD Amplifier (Source Follower) 4154.4.3 CG Amplifier 4194.5 FET Inverter Time Response 423Problems 4285 OP Amp Circuits 4675.1 OP Amp Basics[Y-1] 4685.2 OP Amp Circuits with Resistors[Y-1] 4715.2.1 OP Amp Circuits with Negative Feedback 4715.2.1.1 Inverting OP Amp Circuit 4715.2.1.2 Non-Inverting OP Amp Circuit 4735.2.1.3 Voltage Follower 4765.2.1.4 Linear Combiner 4775.2.2 OP Amp Circuits with Positive Feedback 4795.2.2.1 Inverting Positive Feedback OP Amp Circuit 4805.2.2.2 Non-Inverting Positive Feedback OP Amp Circuit 4815.3 First-Order OP Amp Circuits[Y-1] 4855.3.1 First-Order OP Amp Circuits with Negative Feedback 4855.3.2 First-Order OP Amp Circuits with Positive Feedback 4875.3.2.1 Square(Rectangular)-Wave Generator 4875.3.2.2 Rectangular/Triangular-Wave Generator 4905.3.3 555 Timer Using OP Amp as Comparator 4925.4 Second-Order OP Amp Circuits[Y-1] 4955.4.1 MFB (Multi-FeedBack) Topology 4955.4.2 Sallen-Key Topology 4965.5 Active Filter[Y-1] 5025.5.1 First-Order Active Filter 5025.5.2 Second-Order Active LPF/HPF 5035.5.3 Second-Order Active BPF 5055.5.4 Second-Order Active BSF 507Problems 5126 Analog Filter 5236.1 Analog Filter Design 5236.2 Passive Filter 5336.2.1 Low-pass Filter (LPF) 5336.2.1.1 Series LR Circuit 5336.2.1.2 Series RC Circuit 5356.2.2 High-pass Filter (HPF) 5356.2.2.1 Series CR Circuit 5356.2.2.2 Series RL Circuit 5366.2.3 Band-pass Filter (BPF) 5376.2.3.1 Series Resistor, an Inductor, and a Capacitor (RLC) Circuit and Series Resonance 5366.2.3.2 Parallel RLC Circuit and Parallel Resonance 5396.2.4 Band-stop Filter (BSF) 5416.2.4.1 Series RLC Circuit 5416.2.4.2 Parallel RLC Circuit 5446.2.5 Quality Factor 5456.2.6 Insertion Loss 5496.2.7 Frequency Scaling and Transformation 5496.3 Passive Filter Realization 5536.3.1 LC Ladder 5536.3.2 L-Type Impedance Matcher 5616.3.3 T- and Ï-Type Impedance Matchers 5656.3.4 Tapped-C Impedance Matchers 5716.4 Active Filter Realization 576Problems 5867 Smith Chart and Impedance Matching 6017.1 Transmission Line 6017.2 Smith Chart 6087.3 Impedance Matching Using Smith Chart 6167.3.1 Reactance Effect of a Lossless Line 6167.3.2 Single-Stub Impedance Matching 6187.3.2.1 Shunt-Connected Single Stub 6187.3.2.2 Series-Connected Single Stub 6227.3.3 Double-Stub Impedance Matching 6267.3.4 The Quarter-Wave Transformer 6317.3.4.1 Binomial Multisection QWT 6337.3.4.2 Chebyshev Multisection QWT 6347.3.5 Filter Implementation Using Stubs[P-1] 6357.3.6 Impedance Matching with Lumped Elements 646Problems 6618 Two-Port Network and Parameters 6778.1 Two-Port Parameters[Y-1] 6778.1.1 Definitions and Examples of Two-Port Parameters 6788.1.2 Relationships Among Two-Port Parameters 6858.1.3 Interconnection of Two-Port Networks 6898.1.3.1 Series Connection and z-parameters 6908.1.3.2 Parallel (Shunt) Connection and y-parameters 6908.1.3.3 Series-Parallel(Shunt) Connection and h-parameters 6918.1.3.4 Parallel(Shunt)-Series Connection and g-parameters 6918.1.3.5 Cascade Connection and a-parameters 6928.1.4 Curse of Port Condition 6928.1.5 Circuit Models with Given Parameters 6978.1.5.1 Circuit Model with Given z-parameters 6978.1.5.2 Circuit Model with Given y-parameters 6998.1.5.3 Circuit Model with Given a/b-parameters 6998.1.5.4 Circuit Model with Given h/g-parameters 6998.1.6 Properties of Two-Port Networks with Source/Load 7008.2 Scattering Parameters 7098.2.1 Definition of Scattering Parameters 7098.2.2 Two-Port Network with Source/Load 7148.3 Gain and Stability 7238.3.1 Two-Port Power Gains[L-1, P-1] 7238.3.2 Stability [E-1, L-1, P-1] 7288.3.3 Design for Maximum Gain [M-2, P-1] 7338.3.4 Design for Specified Gain [M-2, P-1] 740Problems 746Appendix A Laplace Transform 761Appendix B Matrix Operations with MATLAB 767Appendix C Complex Number Operations with MATLAB 773Appendix D Nonlinear/Differential Equations with MATLAB 775Appendix E Symbolic Computations with MATLAB 779Appendix F Useful Formulas 783Appendix G Standard Values of Resistors, Capacitors, and Inductors 785Appendix H OrCAD/PSpice® 791Appendix I MATLAB® Introduction 831Appendix J Diode/BJT/FET 835Bibliography 845Index 849

Won Y. Yang, PhD, is an Emeritus Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Jaekwon Kim, PhD, is a Professor in the Department of Computer & Telecommunications Engineering at Yonsei University in Wonju, Korea. Kyung W. Park, PhD, is a Managerial Researcher at Korea Electronics Technology Institute, Seoul, Korea. Donghyun Baek, PHD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Sungjoon Lim, PhD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Jingon Joung, PhD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Suhyun Park, PhD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Han L. Lee, PhD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Woo June Choi, PhD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Taeho Im, PhD, is a Professor in Oceanic IT Engineering at Hoseo University in Asan, Korea.

• Preface xiiiAbout the Companion Website xv1 Load Line Analysis and Fourier Series 11.1 Load Line Analysis 11.1.1 Load Line Analysis of a Nonlinear Resistor Circuit 31.1.2 Load Line Analysis of a Nonlinear RL circuit 71.2 Voltage-Current Source Transformation 101.3 Thevenin/Norton Equivalent Circuits 111.4 Miller’s Theorem 181.5 Fourier Series 181.5.1 Computation of Fourier Coefficients Using Symmetry 201.5.2 Circuit Analysis Using Fourier Series 291.5.3 RMS Value and Distortion Factor of a Non-Sinusoidal Periodic Signal 35Problems 362 Diode Circuits 432.1 The v-i Characteristic of Diodes 432.1.1 Large-Signal Diode Model for Switching Operations 442.1.2 Small-Signal Diode Model for Amplifying Operations 442.2 Analysis/Simulation of Diode Circuits 462.2.1 Examples of Diode Circuits 462.2.2 Clipper/Clamper Circuits 512.2.3 Half-wave Rectifier 532.2.4 Half-wave Rectifier with Capacitor – Peak Rectifier 532.2.5 Full-wave Rectifier 572.2.6 Full-wave Rectifier with LC Filter 592.2.7 Precision Rectifiers 622.2.7.1 Improved Precision Half-wave Rectifier 632.2.7.2 Precision Full-wave Rectifier 652.2.8 Small-Signal (AC) Analysis of Diode Circuits 672.3 Zender Diodes 75Problems 853 BJT Circuits 1053.1 BJT (Bipolar Junction Transistor) 1063.1.1 Ebers-Moll Representation of BJT 1063.1.2 Operation Modes (Regions) of BJT 1093.1.3 Parameters of BJT 1093.1.4 Common-Base Configuration 1113.1.5 Common-Emitter Configuration 1133.1.6 Large-Signal (DC) Model of BJT 1153.1.7 Small-Signal (AC) Model of BJT 1423.1.8 Analysis of BJT Circuits 1433.1.9 BJT Current Mirror 1563.1.10 BJT Inverter/Switch 1613.1.11 Emitter-Coupled Differential Pair 1653.2 BJT Amplifier Circuits 1683.2.1 Common-Emitter (CE) Amplifier 1693.2.2 Common-Collector (CC) Amplifier (Emitter Follower) 1733.2.3 Common-Base (CB) Amplifier 1803.2.4 Multistage Cascaded BJT Amplifier 1873.2.5 Composite/Compound Multi-Stage BJT Amplifier 1993.3 Logic Gates Using Diodes/Transistors[C-3, M-1] 2093.3.1 DTL NAND Gate 2093.3.2 TTL NAND Gate 2153.3.2.1 Basic TTL NAND Gate Using Two BJTs 2153.3.2.2 TTL NAND Gate Using Three BJTs 2183.3.2.3 Totem-Pole Output Stage 2223.3.2.4 Open-Collector Output and Tristate Output 2273.3.3 ECL (Emitter-Coupled Logic) OR/NOR Gate 2293.4 Design of BJT Amplifier 2393.4.1 Design of CE Amplifier with Specified Voltage Gain 2323.4.2 Design of CC Amplifier (Emitter Follower) with Specified Input Resistance 2393.5 BJT Amplifier Frequency Response 2433.5.1 CE Amplifier 2433.5.2 CC Amplifier (Emitter Follower) 2483.5.3 CB Amplifier 2553.6 BJT Inverter Time Response 259Problems 2664 FET Circuits 3034.1 Field-Effect Transistor (FET) 3034.1.1 JFET (Junction FET) 3044.1.2 MOSFET (Metal-Oxide-Semiconductor FET) 3134.1.3 MOSFET Used as a Resistor 3274.1.4 FET Current Mirror 3284.1.5 MOSFET Inverter 3384.1.5.1 NMOS Inverter Using an Enhancement NMOS as a Load 3424.1.5.2 NMOS Inverter Using a Depletion NMOS as a Load 3474.1.5.3 CMOS Inverter 3504.1.6 Source-Coupled Differential Pair 3554.1.7 CMOS Logic Circuits 3594.2 FET Amplifer 3604.2.1 Common-Source (CS) Amplifier 3624.2.2 CD Amplifier (Source Follower) 3664.2.3 Common-Gate (CG) Amplifier 3704.2.4 Common-Source (CS) Amplifier with FET Load 3734.2.4.1 CS Amplifier with an Enhancement FET Load 3734.2.4.2 CS Amplifier with a Depletion FET Load 3764.2.5 Multistage FET Amplifiers 3804.3 Design of FET Amplifier 3984.3.1 Design of CS Amplifier 3984.3.2 Design of CD Amplifier 4054.4 FET Amplifier Frequency Response 4094.4.1 CS Amplifier 4104.4.2 CD Amplifier (Source Follower) 4154.4.3 CG Amplifier 4194.5 FET Inverter Time Response 423Problems 4285 OP Amp Circuits 4675.1 OP Amp Basics[Y-1] 4685.2 OP Amp Circuits with Resistors[Y-1] 4715.2.1 OP Amp Circuits with Negative Feedback 4715.2.1.1 Inverting OP Amp Circuit 4715.2.1.2 Non-Inverting OP Amp Circuit 4735.2.1.3 Voltage Follower 4765.2.1.4 Linear Combiner 4775.2.2 OP Amp Circuits with Positive Feedback 4795.2.2.1 Inverting Positive Feedback OP Amp Circuit 4805.2.2.2 Non-Inverting Positive Feedback OP Amp Circuit 4815.3 First-Order OP Amp Circuits[Y-1] 4855.3.1 First-Order OP Amp Circuits with Negative Feedback 4855.3.2 First-Order OP Amp Circuits with Positive Feedback 4875.3.2.1 Square(Rectangular)-Wave Generator 4875.3.2.2 Rectangular/Triangular-Wave Generator 4905.3.3 555 Timer Using OP Amp as Comparator 4925.4 Second-Order OP Amp Circuits[Y-1] 4955.4.1 MFB (Multi-FeedBack) Topology 4955.4.2 Sallen-Key Topology 4965.5 Active Filter[Y-1] 5025.5.1 First-Order Active Filter 5025.5.2 Second-Order Active LPF/HPF 5035.5.3 Second-Order Active BPF 5055.5.4 Second-Order Active BSF 507Problems 5126 Analog Filter 5236.1 Analog Filter Design 5236.2 Passive Filter 5336.2.1 Low-pass Filter (LPF) 5336.2.1.1 Series LR Circuit 5336.2.1.2 Series RC Circuit 5356.2.2 High-pass Filter (HPF) 5356.2.2.1 Series CR Circuit 5356.2.2.2 Series RL Circuit 5366.2.3 Band-pass Filter (BPF) 5376.2.3.1 Series Resistor, an Inductor, and a Capacitor (RLC) Circuit and Series Resonance 5366.2.3.2 Parallel RLC Circuit and Parallel Resonance 5396.2.4 Band-stop Filter (BSF) 5416.2.4.1 Series RLC Circuit 5416.2.4.2 Parallel RLC Circuit 5446.2.5 Quality Factor 5456.2.6 Insertion Loss 5496.2.7 Frequency Scaling and Transformation 5496.3 Passive Filter Realization 5536.3.1 LC Ladder 5536.3.2 L-Type Impedance Matcher 5616.3.3 T- and Ï-Type Impedance Matchers 5656.3.4 Tapped-C Impedance Matchers 5716.4 Active Filter Realization 576Problems 5867 Smith Chart and Impedance Matching 6017.1 Transmission Line 6017.2 Smith Chart 6087.3 Impedance Matching Using Smith Chart 6167.3.1 Reactance Effect of a Lossless Line 6167.3.2 Single-Stub Impedance Matching 6187.3.2.1 Shunt-Connected Single Stub 6187.3.2.2 Series-Connected Single Stub 6227.3.3 Double-Stub Impedance Matching 6267.3.4 The Quarter-Wave Transformer 6317.3.4.1 Binomial Multisection QWT 6337.3.4.2 Chebyshev Multisection QWT 6347.3.5 Filter Implementation Using Stubs[P-1] 6357.3.6 Impedance Matching with Lumped Elements 646Problems 6618 Two-Port Network and Parameters 6778.1 Two-Port Parameters[Y-1] 6778.1.1 Definitions and Examples of Two-Port Parameters 6788.1.2 Relationships Among Two-Port Parameters 6858.1.3 Interconnection of Two-Port Networks 6898.1.3.1 Series Connection and z-parameters 6908.1.3.2 Parallel (Shunt) Connection and y-parameters 6908.1.3.3 Series-Parallel(Shunt) Connection and h-parameters 6918.1.3.4 Parallel(Shunt)-Series Connection and g-parameters 6918.1.3.5 Cascade Connection and a-parameters 6928.1.4 Curse of Port Condition 6928.1.5 Circuit Models with Given Parameters 6978.1.5.1 Circuit Model with Given z-parameters 6978.1.5.2 Circuit Model with Given y-parameters 6998.1.5.3 Circuit Model with Given a/b-parameters 6998.1.5.4 Circuit Model with Given h/g-parameters 6998.1.6 Properties of Two-Port Networks with Source/Load 7008.2 Scattering Parameters 7098.2.1 Definition of Scattering Parameters 7098.2.2 Two-Port Network with Source/Load 7148.3 Gain and Stability 7238.3.1 Two-Port Power Gains[L-1, P-1] 7238.3.2 Stability [E-1, L-1, P-1] 7288.3.3 Design for Maximum Gain [M-2, P-1] 7338.3.4 Design for Specified Gain [M-2, P-1] 740Problems 746Appendix A Laplace Transform 761Appendix B Matrix Operations with MATLAB 767Appendix C Complex Number Operations with MATLAB 773Appendix D Nonlinear/Differential Equations with MATLAB 775Appendix E Symbolic Computations with MATLAB 779Appendix F Useful Formulas 783Appendix G Standard Values of Resistors, Capacitors, and Inductors 785Appendix H OrCAD/PSpice® 791Appendix I MATLAB® Introduction 831Appendix J Diode/BJT/FET 835Bibliography 845Index 849

Won Y. Yang, PhD, is an Emeritus Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Jaekwon Kim, PhD, is a Professor in the Department of Computer & Telecommunications Engineering at Yonsei University in Wonju, Korea. Kyung W. Park, PhD, is a Managerial Researcher at Korea Electronics Technology Institute, Seoul, Korea. Donghyun Baek, PHD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Sungjoon Lim, PhD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Jingon Joung, PhD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Suhyun Park, PhD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Han L. Lee, PhD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Woo June Choi, PhD, is a Professor in the Department of Electrical Engineering at Chung-Ang University in Seoul, Korea. Taeho Im, PhD, is a Professor in Oceanic IT Engineering at Hoseo University in Asan, Korea.

• Preface xiiiAbout the Companion Website xv1 Load Line Analysis and Fourier Series 11.1 Load Line Analysis 11.1.1 Load Line Analysis of a Nonlinear Resistor Circuit 31.1.2 Load Line Analysis of a Nonlinear RL circuit 71.2 Voltage-Current Source Transformation 101.3 Thevenin/Norton Equivalent Circuits 111.4 Miller’s Theorem 181.5 Fourier Series 181.5.1 Computation of Fourier Coefficients Using Symmetry 201.5.2 Circuit Analysis Using Fourier Series 291.5.3 RMS Value and Distortion Factor of a Non-Sinusoidal Periodic Signal 35Problems 362 Diode Circuits 432.1 The v-i Characteristic of Diodes 432.1.1 Large-Signal Diode Model for Switching Operations 442.1.2 Small-Signal Diode Model for Amplifying Operations 442.2 Analysis/Simulation of Diode Circuits 462.2.1 Examples of Diode Circuits 462.2.2 Clipper/Clamper Circuits 512.2.3 Half-wave Rectifier 532.2.4 Half-wave Rectifier with Capacitor – Peak Rectifier 532.2.5 Full-wave Rectifier 572.2.6 Full-wave Rectifier with LC Filter 592.2.7 Precision Rectifiers 622.2.7.1 Improved Precision Half-wave Rectifier 632.2.7.2 Precision Full-wave Rectifier 652.2.8 Small-Signal (AC) Analysis of Diode Circuits 672.3 Zender Diodes 75Problems 853 BJT Circuits 1053.1 BJT (Bipolar Junction Transistor) 1063.1.1 Ebers-Moll Representation of BJT 1063.1.2 Operation Modes (Regions) of BJT 1093.1.3 Parameters of BJT 1093.1.4 Common-Base Configuration 1113.1.5 Common-Emitter Configuration 1133.1.6 Large-Signal (DC) Model of BJT 1153.1.7 Small-Signal (AC) Model of BJT 1423.1.8 Analysis of BJT Circuits 1433.1.9 BJT Current Mirror 1563.1.10 BJT Inverter/Switch 1613.1.11 Emitter-Coupled Differential Pair 1653.2 BJT Amplifier Circuits 1683.2.1 Common-Emitter (CE) Amplifier 1693.2.2 Common-Collector (CC) Amplifier (Emitter Follower) 1733.2.3 Common-Base (CB) Amplifier 1803.2.4 Multistage Cascaded BJT Amplifier 1873.2.5 Composite/Compound Multi-Stage BJT Amplifier 1993.3 Logic Gates Using Diodes/Transistors[C-3, M-1] 2093.3.1 DTL NAND Gate 2093.3.2 TTL NAND Gate 2153.3.2.1 Basic TTL NAND Gate Using Two BJTs 2153.3.2.2 TTL NAND Gate Using Three BJTs 2183.3.2.3 Totem-Pole Output Stage 2223.3.2.4 Open-Collector Output and Tristate Output 2273.3.3 ECL (Emitter-Coupled Logic) OR/NOR Gate 2293.4 Design of BJT Amplifier 2393.4.1 Design of CE Amplifier with Specified Voltage Gain 2323.4.2 Design of CC Amplifier (Emitter Follower) with Specified Input Resistance 2393.5 BJT Amplifier Frequency Response 2433.5.1 CE Amplifier 2433.5.2 CC Amplifier (Emitter Follower) 2483.5.3 CB Amplifier 2553.6 BJT Inverter Time Response 259Problems 2664 FET Circuits 3034.1 Field-Effect Transistor (FET) 3034.1.1 JFET (Junction FET) 3044.1.2 MOSFET (Metal-Oxide-Semiconductor FET) 3134.1.3 MOSFET Used as a Resistor 3274.1.4 FET Current Mirror 3284.1.5 MOSFET Inverter 3384.1.5.1 NMOS Inverter Using an Enhancement NMOS as a Load 3424.1.5.2 NMOS Inverter Using a Depletion NMOS as a Load 3474.1.5.3 CMOS Inverter 3504.1.6 Source-Coupled Differential Pair 3554.1.7 CMOS Logic Circuits 3594.2 FET Amplifer 3604.2.1 Common-Source (CS) Amplifier 3624.2.2 CD Amplifier (Source Follower) 3664.2.3 Common-Gate (CG) Amplifier 3704.2.4 Common-Source (CS) Amplifier with FET Load 3734.2.4.1 CS Amplifier with an Enhancement FET Load 3734.2.4.2 CS Amplifier with a Depletion FET Load 3764.2.5 Multistage FET Amplifiers 3804.3 Design of FET Amplifier 3984.3.1 Design of CS Amplifier 3984.3.2 Design of CD Amplifier 4054.4 FET Amplifier Frequency Response 4094.4.1 CS Amplifier 4104.4.2 CD Amplifier (Source Follower) 4154.4.3 CG Amplifier 4194.5 FET Inverter Time Response 423Problems 4285 OP Amp Circuits 4675.1 OP Amp Basics[Y-1] 4685.2 OP Amp Circuits with Resistors[Y-1] 4715.2.1 OP Amp Circuits with Negative Feedback 4715.2.1.1 Inverting OP Amp Circuit 4715.2.1.2 Non-Inverting OP Amp Circuit 4735.2.1.3 Voltage Follower 4765.2.1.4 Linear Combiner 4775.2.2 OP Amp Circuits with Positive Feedback 4795.2.2.1 Inverting Positive Feedback OP Amp Circuit 4805.2.2.2 Non-Inverting Positive Feedback OP Amp Circuit 4815.3 First-Order OP Amp Circuits[Y-1] 4855.3.1 First-Order OP Amp Circuits with Negative Feedback 4855.3.2 First-Order OP Amp Circuits with Positive Feedback 4875.3.2.1 Square(Rectangular)-Wave Generator 4875.3.2.2 Rectangular/Triangular-Wave Generator 4905.3.3 555 Timer Using OP Amp as Comparator 4925.4 Second-Order OP Amp Circuits[Y-1] 4955.4.1 MFB (Multi-FeedBack) Topology 4955.4.2 Sallen-Key Topology 4965.5 Active Filter[Y-1] 5025.5.1 First-Order Active Filter 5025.5.2 Second-Order Active LPF/HPF 5035.5.3 Second-Order Active BPF 5055.5.4 Second-Order Active BSF 507Problems 5126 Analog Filter 5236.1 Analog Filter Design 5236.2 Passive Filter 5336.2.1 Low-pass Filter (LPF) 5336.2.1.1 Series LR Circuit 5336.2.1.2 Series RC Circuit 5356.2.2 High-pass Filter (HPF) 5356.2.2.1 Series CR Circuit 5356.2.2.2 Series RL Circuit 5366.2.3 Band-pass Filter (BPF) 5376.2.3.1 Series Resistor, an Inductor, and a Capacitor (RLC) Circuit and Series Resonance 5366.2.3.2 Parallel RLC Circuit and Parallel Resonance 5396.2.4 Band-stop Filter (BSF) 5416.2.4.1 Series RLC Circuit 5416.2.4.2 Parallel RLC Circuit 5446.2.5 Quality Factor 5456.2.6 Insertion Loss 5496.2.7 Frequency Scaling and Transformation 5496.3 Passive Filter Realization 5536.3.1 LC Ladder 5536.3.2 L-Type Impedance Matcher 5616.3.3 T- and Ï-Type Impedance Matchers 5656.3.4 Tapped-C Impedance Matchers 5716.4 Active Filter Realization 576Problems 5867 Smith Chart and Impedance Matching 6017.1 Transmission Line 6017.2 Smith Chart 6087.3 Impedance Matching Using Smith Chart 6167.3.1 Reactance Effect of a Lossless Line 6167.3.2 Single-Stub Impedance Matching 6187.3.2.1 Shunt-Connected Single Stub 6187.3.2.2 Series-Connected Single Stub 6227.3.3 Double-Stub Impedance Matching 6267.3.4 The Quarter-Wave Transformer 6317.3.4.1 Binomial Multisection QWT 6337.3.4.2 Chebyshev Multisection QWT 6347.3.5 Filter Implementation Using Stubs[P-1] 6357.3.6 Impedance Matching with Lumped Elements 646Problems 6618 Two-Port Network and Parameters 6778.1 Two-Port Parameters[Y-1] 6778.1.1 Definitions and Examples of Two-Port Parameters 6788.1.2 Relationships Among Two-Port Parameters 6858.1.3 Interconnection of Two-Port Networks 6898.1.3.1 Series Connection and z-parameters 6908.1.3.2 Parallel (Shunt) Connection and y-parameters 6908.1.3.3 Series-Parallel(Shunt) Connection and h-parameters 6918.1.3.4 Parallel(Shunt)-Series Connection and g-parameters 6918.1.3.5 Cascade Connection and a-parameters 6928.1.4 Curse of Port Condition 6928.1.5 Circuit Models with Given Parameters 6978.1.5.1 Circuit Model with Given z-parameters 6978.1.5.2 Circuit Model with Given y-parameters 6998.1.5.3 Circuit Model with Given a/b-parameters 6998.1.5.4 Circuit Model with Given h/g-parameters 6998.1.6 Properties of Two-Port Networks with Source/Load 7008.2 Scattering Parameters 7098.2.1 Definition of Scattering Parameters 7098.2.2 Two-Port Network with Source/Load 7148.3 Gain and Stability 7238.3.1 Two-Port Power Gains[L-1, P-1] 7238.3.2 Stability [E-1, L-1, P-1] 7288.3.3 Design for Maximum Gain [M-2, P-1] 7338.3.4 Design for Specified Gain [M-2, P-1] 740Problems 746Appendix A Laplace Transform 761Appendix B Matrix Operations with MATLAB 767Appendix C Complex Number Operations with MATLAB 773Appendix D Nonlinear/Differential Equations with MATLAB 775Appendix E Symbolic Computations with MATLAB 779Appendix F Useful Formulas 783Appendix G Standard Values of Resistors, Capacitors, and Inductors 785Appendix H OrCAD/PSpice® 791Appendix I MATLAB® Introduction 831Appendix J Diode/BJT/FET 835Bibliography 845Index 849