Domain-Specific Computer Architectures for Emerging Applications II

From Deep Learning to Large Language Models

Inbunden, Engelska, 2027

AvChao Wang,Wenqi Lou,Teng Wang,Lei Gong,Xuehai Zhou

1 739 kr

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Domain-Specific Computer Architectures for Emerging Applications II: From Deep Learning to Large Language Models provides a systematic account of the architectural shift from task-specific deep learning accelerators to the computing platforms required by transformer-based large language models, Vision Transformers, and mixture-of-experts networks.As AI models scale, performance is determined not only by arithmetic throughput but also by memory bandwidth, data movement, communication efficiency, compiler support, and full-stack hardware-software co-design. This book explains why acceleration strategies developed for convolutional neural networks are no longer sufficient for many contemporary workloads, and presents the architectural principles required for self-attention, sparse execution, KV-cache management, heterogeneous acceleration, and cluster-scale inference. By connecting algorithmic structure with accelerator design, compiler automation, and distributed systems, it offers a unified technical framework for modern AI computing. Topics covered include GPUs, FPGAs, ASICs, spatial accelerators, sparse tensor compilation, auto-tuning, high-level synthesis, neural architecture search, and scalable large language model serving.Combining conceptual foundations with concrete system methodologies, the book is intended for graduate students, researchers, and practitioners in computer architecture, AI systems, and hardware-software co-design seeking to understand how specialized computing platforms are evolving for the foundation-model era.

Produktinformation

Utgivningsdatum2027-01-14
Mått156 x 234 x undefined mm
FormatInbunden
SpråkEngelska
Antal sidor400
FörlagTaylor & Francis Ltd
ISBN9781032952192

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Chao Wang is a Professor, Vice Dean of the School of Software, and doctoral supervisor at the University of Science and Technology of China (USTC). His research interests include FPGA-based reconfigurable computing, intelligent processors, and intelligent computing systems. He has led or participated in national and provincial-level research projects and contributed to intelligent computing systems based on domestic AI chips.Wenqi Lou is an Associate Researcher and master's supervisor in the School of Software at USTC. He received his PhD in computer architecture from USTC in 2023. His research interests include intelligent accelerator architectures, FPGA accelerator design, and hardware-software co-optimization for the deployment of deep learning models.Teng Wang is an Associate Researcher in the School of Software at USTC. He received his PhD in computer architecture from USTC in 2023. His research focuses on reconfigurable hardware accelerators and neural network processors.Lei Gong is an Associate Professor in the School of Computer Science and Technology at USTC. He received his PhD in computer science from USTC in 2019. His research interests include FPGA-based accelerator design and artificial intelligence and machine learning systems.Xuehai Zhou is a Professor and doctoral supervisor at USTC. His research interests include heterogeneous multicore architectures, reconfigurable systems, application-specific hardware acceleration, and embedded system design. He has led or participated in more than 30 national research projects.

1. Foundations of Domain-Specific Computer Architectures in the Era of Foundation Models 2. An Overview of Large Language Models and Fundamental Algorithms 3. Modeling and Evaluation Framework for Constrained Dataflow in Spatial Accelerators 4. Heterogeneous Acceleration and Adaptive Mapping for Vision Transformers 5. Collaborative Design of MoE ViT: Quantization and Computation Orchestration 6. Scalable Inference Acceleration System for LLM 7. A Compiler Framework for Automatic Generation of High-Performance FPGA Accelerators for Sparse Tensor Computations 8. Tensor Program Auto-Tuning for Tensorized Intrinsics and Diverse GPU 9. High-Level Synthesis Toolchain Enhancement 10. Neural Architecture Search with Zero/Few-Shot Performance Proxies 11. CNN-FPGA Co-Optimization: Synergistic Design of Operator Search, Model Compression, and Hardware Acceleration 12. CNN-ASIC Co-Search and Joint Optimization: Zero-Cost Proxy-Driven Heterogeneous Multi-Core Accelerator Design