Digital Design using VerilogHDL

Shilpi Birla, PhD is an Associate Professor in the Electronics & Communication Department at Manipal University Jaipur. She has over 15 years of teaching and industrial experience. Professor Birla completed her PhD in Low Power VLSI Design, and her research interests include Low Power VLSI Design, Memory Circuits, Digital VLSI Circuits, Nanodevices and Image Processing. She has authored more than 60 research papers in journals of repute and international conferences. She has organized several workshops in HSPICE, TCAD and XILINX, Summer internships in Diode Fabrication and Faculty Development Programs. She has acted as Session Chair, conference steering committee member, editorial board member, and reviewer in international IEEE journals and conferences. She has guided many M. Tech Students and PhD students in the course of her career and is a senior member of IEEE.Dr. B. P. Singh, a Fellow IEEE, IETE, IEE(India), born in 1947 in a remote village, ORRO, NAWADA, PATNA (INDIA), is presently, Prof. Adjunct, Netaji Subhas University of Technology, New Delhi. He is B.Sc. (Engg.) 1967, M.Sc. (Engg.) 1970, and Ph.D. 1980 in the field of Electronics and Communication from Ranchi University, Ranchi (Jharkhand). He has total teaching experience of over 45 years in different Universities such as BIT Mesra, Ranchi (deemed to be the University), IIT Dhanbad (Jharkhand), M.M.M. Technological University, Gorakhpur (U.P.), Mody Institute of Science & Technology, Laxmangarh, Sikar (Rajasthan), IITM, Kanpur, and Manipal University Jaipur. He has published 76 papers in International Journals, 11 in National Journals, 64 in International Conferences, and 34 in National conferences. He has authored 6 books with Publishers like Pearson Education, New Age publication and successfully guided 10 candidates for the award of Ph.D. degree. He was Branch Counsellor of IEEE Student Branch, M.M.M. Technological University, Gorakhpur from 1987 to June 2009, Vice-Chairman, IEEE UP state Centre, IIT Kanpur, two terms. He got IEEE best counsellor award twice this duration. His one of the paper has been included in Astrophysics Data System library of NASA. He was awarded for best tutorial paper by IEEE IIT Kharagpur. One of his papers was adjudged as the best in the Journal of Institution of Engineers (India). On quality sampling his one paper was selected by ISI US to be kept in their Library for Research purpose after receiving his consent. Bharat Electronics Bangalore has thankfully acknowledged the mistake pointed by him in their research publications. He is certificate holder of Amateur W/T communication equipment certified by Ministry of Communication after passing the written and practical examination. He was the Chairman, Board of Governor of MLV Textile and Engineering College Bhilwara, a Govt. Engineering college of Rajasthan.Dr. Neeraj Kumar Shukla is an Associate Professor in the Electrical Engineering Department, King Khalid University, Abha, Kingdom of Saudi Arabia. He has Ph.D in Digital VLSI Design (Electronics/Computer Engineering) from UK Technical University, Master of Technology (M.Tech), and Bachelor of Technology (B.Tech) in Electronics Engineering from University of Allahabad. He has a rich experience of more than 22 Years in Core Electronics/Computer Industry & Academic Universities Globally. His research interests are Digital VLSI Design, Low-Power Static Random Access Memory Characterization, and Recent Developments in Electronics & Computer Engineering. He has published more than 115 research articles in reputed journals and conferences. He has supervised 3 PhDs and 30 MTech dissertations. He has delivered more than 50 skills development programs in VLSI Design to make engineering graduates employable to Core Semiconductor Industries.

• Part One: Digital Logic1. Number Systems and their representation2. Logic family3. Combinational Circuits4. Arithmetic Circuits5. Sequential Circuits6. State Machines7. Memory DesignPart Two: VerilogHDL8. Modeling in VerilogHDL9. VerilogHDL Coding and Testbench Verification