Design of Multi-Bit Delta-Sigma A/D Converters

This text discusses both architecture and circuit design aspects of Delta-Sigma A/D converters, with a special focus on multi-bit implementations. The emphasis is on high-speed high-resolution converters in CMOS for ADSL applications, although the material can also be applied for other specification goals and technologies. The book starts with a general introduction of the concepts of Delta-Sigma converters. A wide variety of architectures are discussed, ranging from single-loop to cascaded and various multi-bit topologies. These topologies are optimized to obtain stable converters with a high accuracy. A clear overview is provided of the maximum achievable performance of each topology, which allows a designer to select the optimal architecture for a certain specification. Special attention is paid to multi-bit architectures and possible solutions for the linearity problem of the DA converter in the feedback loop of converters. Several circuit design aspects of multi-bit Delta-Sigma converters are discussed. Various models are provided for a wide range of linear and non-linear circuit imperfections, which can degrade the performance of the converter.These models allow the designer to determine the required specifications for the different building blocks and form the basis of a systematic design procedure. The presented material is combined in a concluding chapter, which illustrates the systematic design procedure for two high-performance converters. Design of Multi-Bit Delta-Sigma A/D Converters provides a clear comparison of architectures and yields insight into the influence of the most important circuit non-idealities. It should allow you to design robust and high-performance Delta-Sigma AD converters in a shorter time.