Dr. Rino Micheloni is Fellow at Microsemi Corporation where he currently runs the Non-Volatile Memory Lab in Milan, with special focus on NAND Flash. Prior to joining Microsemi, he was Fellow at PMC-Sierra, working on NAND Flash characterization, LDPC, and NAND Signal Processing as part of the team developing Flash controllers for PCIe SSDs. Before that, he was with IDT (Integrated Device Technology) as Lead Flash Technologist, driving the architecture and design of the BCH engine in the world’s 1st PCIe NVMe SSD controller. Early in his career, he led Flash design teams at STMicroelectronics, Hynix, Infineon, and Qimonda; during this time, he developed the industry’s first MLC NOR device with embedded ECC technology and the industry’s first MLC NAND with embedded BCH. Rino is IEEE Senior Member, he has co-authored more than 50 publications, and he holds 240 patents worldwide (including 118 US patents). He received the STMicroelectronics Exceptional Patent Award in 2003 and2004, and the Qimonda IP Award in 2007. Rino has published the following books with Springer: Inside Solid State Drives (2013), Inside NAND Flash Memories (2010), Error Correction Codes for Non-Volatile Memories (2008), Memories in Wireless Systems (2008), and VLSI-Design of Non-Volatile Memories (2005).

• Dedication Page.- Foreword.- Preface.- Introduction.- About the Editor.- Acknowledgements.- 1 The Business of NAND.- 2 Reliability of 3D NAND Flash memories.- 3 3D Stacked NAND Flash memories.- 4 3D Charge Trap NAND Flash memories.- 5 3D Floating Gate NAND Flash memories.- 6 Advanced Architectures for 3D NAND Flash memories with vertical channel.- 7 3D VG-Type NAND Flash memories.- 8 RRAM Cross-point arrays.- 9 3D Multi-Chip Integration and Packaging Technology.- 10 BCH and LDPC Error Correction Codes for NAND Flash memories.- 11 Advanced algebraic and graph-based ECC schemes for modern NVMs.- 12 System-Level Considerations on Design of 3D NAND Flash memories.- Index.

“It would be a valuable addition to a scientific library, as well as served as good introduction for 3D flash memories device reliability engineers or specialists and industrials involved in the field of 3D flash device reliability in semiconductor non-volatile memory. This book is highly recommended for people who desire a better understanding of the theory and practice of 3D flash memories and technical considerations in 3D memories and its product reliability.” (Chong Leong Gan and Uda Hashim, Microelectronics Reliability, August, 2016)

Dr. Rino Micheloni is Fellow at Microsemi Corporation where he currently runs the Non-Volatile Memory Lab in Milan, with special focus on NAND Flash. Prior to joining Microsemi, he was Fellow at PMC-Sierra, working on NAND Flash characterization, LDPC, and NAND Signal Processing as part of the team developing Flash controllers for PCIe SSDs. Before that, he was with IDT (Integrated Device Technology) as Lead Flash Technologist, driving the architecture and design of the BCH engine in the world’s 1st PCIe NVMe SSD controller. Early in his career, he led Flash design teams at STMicroelectronics, Hynix, Infineon, and Qimonda; during this time, he developed the industry’s first MLC NOR device with embedded ECC technology and the industry’s first MLC NAND with embedded BCH. Rino is IEEE Senior Member, he has co-authored more than 50 publications, and he holds 240 patents worldwide (including 118 US patents). He received the STMicroelectronics Exceptional Patent Award in 2003 and2004, and the Qimonda IP Award in 2007. Rino has published the following books with Springer: Inside Solid State Drives (2013), Inside NAND Flash Memories (2010), Error Correction Codes for Non-Volatile Memories (2008), Memories in Wireless Systems (2008), and VLSI-Design of Non-Volatile Memories (2005).

• Dedication Page.- Foreword.- Preface.- Introduction.- About the Editor.- Acknowledgements.- 1 The Business of NAND.- 2 Reliability of 3D NAND Flash memories.- 3 3D Stacked NAND Flash memories.- 4 3D Charge Trap NAND Flash memories.- 5 3D Floating Gate NAND Flash memories.- 6 Advanced Architectures for 3D NAND Flash memories with vertical channel.- 7 3D VG-Type NAND Flash memories.- 8 RRAM Cross-point arrays.- 9 3D Multi-Chip Integration and Packaging Technology.- 10 BCH and LDPC Error Correction Codes for NAND Flash memories.- 11 Advanced algebraic and graph-based ECC schemes for modern NVMs.- 12 System-Level Considerations on Design of 3D NAND Flash memories.- Index.

“It would be a valuable addition to a scientific library, as well as served as good introduction for 3D flash memories device reliability engineers or specialists and industrials involved in the field of 3D flash device reliability in semiconductor non-volatile memory. This book is highly recommended for people who desire a better understanding of the theory and practice of 3D flash memories and technical considerations in 3D memories and its product reliability.” (Chong Leong Gan and Uda Hashim, Microelectronics Reliability, August, 2016)

Dr. Rino Micheloni is Fellow at Microsemi Corporation where he currently runs the Non-Volatile Memory Lab in Milan, with special focus on NAND Flash. Prior to joining Microsemi, he was Fellow at PMC-Sierra, working on NAND Flash characterization, LDPC, and NAND Signal Processing as part of the team developing Flash controllers for PCIe SSDs. Before that, he was with IDT (Integrated Device Technology) as Lead Flash Technologist, driving the architecture and design of the BCH engine in the world’s 1st PCIe NVMe SSD controller. Early in his career, he led Flash design teams at STMicroelectronics, Hynix, Infineon, and Qimonda; during this time, he developed the industry’s first MLC NOR device with embedded ECC technology and the industry’s first MLC NAND with embedded BCH. Rino is IEEE Senior Member, he has co-authored more than 50 publications, and he holds 240 patents worldwide (including 118 US patents). He received the STMicroelectronics Exceptional Patent Award in 2003 and2004, and the Qimonda IP Award in 2007. Rino has published the following books with Springer: Inside Solid State Drives (2013), Inside NAND Flash Memories (2010), Error Correction Codes for Non-Volatile Memories (2008), Memories in Wireless Systems (2008), and VLSI-Design of Non-Volatile Memories (2005).

• Dedication Page.- Foreword.- Preface.- Introduction.- About the Editor.- Acknowledgements.- 1 The Business of NAND.- 2 Reliability of 3D NAND Flash memories.- 3 3D Stacked NAND Flash memories.- 4 3D Charge Trap NAND Flash memories.- 5 3D Floating Gate NAND Flash memories.- 6 Advanced Architectures for 3D NAND Flash memories with vertical channel.- 7 3D VG-Type NAND Flash memories.- 8 RRAM Cross-point arrays.- 9 3D Multi-Chip Integration and Packaging Technology.- 10 BCH and LDPC Error Correction Codes for NAND Flash memories.- 11 Advanced algebraic and graph-based ECC schemes for modern NVMs.- 12 System-Level Considerations on Design of 3D NAND Flash memories.- Index.

“It would be a valuable addition to a scientific library, as well as served as good introduction for 3D flash memories device reliability engineers or specialists and industrials involved in the field of 3D flash device reliability in semiconductor non-volatile memory. This book is highly recommended for people who desire a better understanding of the theory and practice of 3D flash memories and technical considerations in 3D memories and its product reliability.” (Chong Leong Gan and Uda Hashim, Microelectronics Reliability, August, 2016)