Modern Semiconductor Devices for Integrated Circuits

Chenming Calvin Hu holds the TSMC Distinguished Professor Chair of Microelectronics at University of California, Berkeley.  He is a member of the US Academy of Engineering and a foreign member of the Chinese Academy of Sciences. From 2001 to 2004, he was the Chief Technology Officer of TSMC. A Fellow of the Institute of Electrical and Electronic Engineers (IEEE), he has been honored with the Jack Morton Award in1997 for his research on transistor reliability, the Solid State Circuits Award in 2002 for co-developing the first international standard transistor model for circuit simulation, and the Jun-ichi Nishizawa Medal in 2009 for exceptional contributions to device physics and scaling. He has supervised over 60 Ph.D. student theses, published 800 technical articles, and received more than 100 US patents. His other honors include Sigma Xi Moni Ferst Award, R&D 100 Award, and UC Berkeley’s highest award for teaching — the Berkeley Distinguished Teaching Award. For additional information, visit the author's Web site.

• 1 Electrons and Holes in Semiconductors 11.1 Silicon Crystal Structure 11.2 Bond Model of Electrons and Holes 41.3 Energy Band Model 81.4 Semiconductors, Insulators, and Conductors 111.5 Electrons and Holes 121.6 Density of States 151.7 Thermal Equilibrium and the Fermi Function 161.8 Electron and Hole Concentrations 191.9 General Theory of n and p 251.10 Carrier Concentrations at Extremely High and Low Temperatures 281.11 Chapter Summary 29PROBLEMS 30REFERENCES 33GENERAL REFERENCES 342 Motion and Recombination of Electrons and Holes 352.1 Thermal Motion 352.2 Drift 382.3 Diffusion Current 462.4 Relation Between the Energy Diagram and V, _ 472.5 Einstein Relationship Between D and μ 482.6 Electron—Hole Recombination 502.7 Thermal Generation 522.8 Quasi-Equilibrium and Quasi-Fermi Levels 522.9 Chapter Summary 54PROBLEMS 56REFERENCES 58GENERAL REFERENCES 583 Device Fabrication Technology 593.1 Introduction to Device Fabrication 603.2 Oxidation of Silicon 613.3 Lithography 643.4 Pattern Transfer–Etching 683.5 Doping 703.6 Dopant Diffusion 733.7 Thin-Film Deposition 753.8 Interconnect–The Back-End Process 803.9 Testing, Assembly, and Qualification 823.10 Chapter Summary–A Device Fabrication Example 83PROBLEMS 85REFERENCES 87GENERAL REFERENCES 884 PN and Metal—Semiconductor Junctions 89Part I: PN Junction 894.1 Building Blocks of the PN Junction Theory 904.2 Depletion-Layer Model 944.3 Reverse-Biased PN Junction 974.4 Capacitance-Voltage Characteristics 984.5 Junction Breakdown 1004.6 Carrier Injection Under Forward Bias–Quasi-Equilibrium Boundary Condition 1054.7 Current Continuity Equation 1074.8 Excess Carriers in Forward-Biased PN Junction 1094.9 PN Diode IV Characteristics 1124.10 Charge Storage 1154.11 Small-Signal Model of the Diode 116Part II: Application to Optoelectronic Devices 1174.12 Solar Cells 1174.13 Light-Emitting Diodes and Solid-State Lighting 1244.14 Diode Lasers 1284.15 Photodiodes 133Part III: Metal—Semiconductor Junction 1334.16 Schottky Barriers 1334.17 Thermionic Emission Theory 1374.18 Schottky Diodes 1384.19 Applications of Schottky Diodes 1404.20 Quantum Mechanical Tunneling 1414.21 Ohmic Contacts 1424.22 Chapter Summary 145PROBLEMS 148REFERENCES 156GENERAL REFERENCES 1565 MOS Capacitor 1575.1 Flat-Band Condition and Flat-Band Voltage 1585.2 Surface Accumulation 1605.3 Surface Depletion 1615.4 Threshold Condition and Threshold Voltage 1625.5 Strong Inversion Beyond Threshold 1645.6 MOS C—V Characteristics 1685.7 Oxide Charge–A Modification to Vfb and Vt 1725.8 Poly-Si Gate Depletion–Effective Increase in Tox 1745.9 Inversion and Accumulation Charge-Layer Thicknesses–Quantum Mechanical Effect 1765.10 CCD Imager and CMOS Imager 1795.11 Chapter Summary 184PROBLEMS 186REFERENCES 193GENERAL REFERENCES 1936 MOS Transistor 1956.1 Introduction to the MOSFET 1956.2 Complementary MOS (CMOS) Technology 1986.3 Surface Mobilities and High-Mobility FETs 2006.4 MOSFET Vt, Body Effect, and Steep Retrograde Doping 2076.5 QINV in MOSFET 2096.6 Basic MOSFET IV Model 2106.7 CMOS Inverter–A Circuit Example 2146.8 Velocity Saturation 2196.9 MOSFET IV Model with Velocity Saturation 2206.10 Parasitic Source-Drain Resistance 2256.11 Extraction of the Series Resistance and the Effective Channel Length 2266.12 Velocity Overshoot and Source Velocity Limit 2286.13 Output Conductance 2296.14 High-Frequency Performance 2306.15 MOSFET Noises 2326.16 SRAM, DRAM, Nonvolatile (Flash) Memory Devices 2386.17 Chapter Summary 245PROBLEMS 247REFERENCES 256GENERAL REFERENCES 2577 MOSFETs in ICs–Scaling, Leakage, and Other Topics 2597.1 Technology Scaling–For Cost, Speed, and Power Consumption 2597.2 Subthreshold Current–“Off” Is Not Totally “Off” 2637.3 Vt Roll-Off–Short-Channel MOSFETs Leak More 2667.4 Reducing Gate-Insulator Electrical Thickness and Tunneling Leakage 2707.5 How to Reduce Wdep 2727.6 Shallow Junction and Metal Source/Drain MOSFET 2747.7 Trade-Off Between Ion and Ioff and Design for Manufacturing 2767.8 Ultra-Thin-Body SOI and Multigate MOSFETs 2777.9 Output Conductance 2827.10 Device and Process Simulation 2837.11 MOSFET Compact Model for Circuit Simulation 2847.12 Chapter Summary 285PROBLEMS 286REFERENCES 288GENERAL REFERENCES 2898 Bipolar Transistor 2918.1 Introduction to the BJT 2918.2 Collector Current 2938.3 Base Current 2978.4 Current Gain 2988.5 Base-Width Modulation by Collector Voltage 3028.6 Ebers—Moll Model 3048.7 Transit Time and Charge Storage 3068.8 Small-Signal Model 3108.9 Cutoff Frequency 3128.10 Charge Control Model 3148.11 Model for Large-Signal Circuit Simulation 3168.12 Chapter Summary 318PROBLEMS 319REFERENCES 323GENERAL REFERENCES 323Appendix IDerivation of the Density of States 325Appendix IIDerivation of the Fermi—Dirac Distribution Function 329Appendix IIISelf-Consistencies of Minority Carrier Assumptions 333Answers to Selected Problems 337Index 341