Nanometer Technology Designs

High-Quality Delay Tests

Inbunden, Engelska, 2007

AvNisar Ahmed,Mohammad Tehranipoor

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Supply noise (including IR-drop, ground bounce, and Ldi/dt) effects on chip performance, high test pattern volume, low fault/defect coverage, small delay defect test pattern generation, high cost of test implementation and application, and utilizing low-cost testers are among these challenges.

Produktinformation

Utgivningsdatum2007-12-20
Mått155 x 235 x 22 mm
Vikt626 g
FormatInbunden
SpråkEngelska
Antal sidor281
Upplaga2008
FörlagSpringer-Verlag New York Inc.
ISBN9780387764863

Tillhör följande kategorier

Introduction to path delay and transition delay fault models and test methods.- At-speed test challenges for nanometer technology designs.- Low-cost tester friendly design-for-test techniques.- Improving test quality of current at-speed test methods.- Functionally untestable fault list generation and avoidance.- Timing-based ATPG for screening small delay faults.- Faster-than-at-speed test considering IR-drop effects.- IR-drop tolerant at-speed test pattern generation and application.