Fundamentals of Embedded Software with the ARM Cortex-M3

Dr. Daniel W. Lewis' efforts led to the creation of Santa Clara University’s Computer Engineering department in 1988, providing its leadership for the first 18 years. During his tenure, Lewis established unique co-op and study abroad options that fit within the normal undergraduate four-year plan, the first graduate-level academic certificate programs for working professionals, a new interdisciplinary major in Web Design and Engineering, and a interdisciplinary minor in Information Technology and Society. Since 2004, Lewis has focused on K-12 outreach in engineering and computing, raising more than $1.7M from NSF and private sources, and providing professional development for more than 200 K-12 teachers and summer camps for more than 2,000 K-12 students.Prior to joining the University in 1975, Lewis worked for six years at General Electric’s Aerospace Division where he designed a fault-tolerant clocking system for one of the first triple-redundant automatic landing systems for commercial aircraft. He has consulted for a number of Bay Area companies, including the Singer-Link Company, where his design of new algorithms and a corresponding modular array of VLSI circuits became the basis of a new product line of real-time computer graphics systems.

• 1 Introduction 1.1 WHAT IS AN EMBEDDED SYSTEM?1.2 WHAT’S UNIQUE ABOUT THE DESIGN GOALS FOR EMBEDDED SOFTWARE?1.3 What Does "Real-Time" Mean?1.4 What Does "multithreading" mean?1.5 HOW POWERFUL ARE EMBEDDED PROCESSORS?1.6 WHAT PROGRAMMING LANGUAGES ARE USED?1.7 HOW IS BUILDING AN EMBEDDED APPLICATION DIFFERENT?1.8 HOW BIG ARE TYPICAL EMBEDDED PROGRAMS?PROBLEMS2 Data Representation2.1 FIXED-PRECISION BINARY NUMBERS 2.2 POSITIONAL NUMBER SYSTEMS2.2.1 Binary-to-Decimal Conversion2.2.2 Decimal-to-Binary Conversion2.2.3 Hexadecimal — A Shorthand for Binary2.2.4 Fixed Precision, Rollover and Overflow2.3 BINARY REPRESENTATION OF INTEGERS2.3.1 Signed Integers2.3.2 Positive and Negative Representations of the Same Magnitude2.3.3 Interpreting the Value of a 2’s-Complement Number2.3.4 Changing the Sign of Numbers with Integer and Fractional Parts2.3.5 Binary Addition and Subtraction2.3.6 Range and Overflow2.4 BINARY REPRESENTATION OF REAL NUMBERS2.4.1 Floating-Point Real Numbers2.4.2 Fixed-Point Real Numbers2.5 ASCII REPRESENTATION OF TEXT2.6 BINARY-CODED DECIMAL (BCD)PROBLEMS3 Implementing Arithmetic 3.1 2’s Complement and hardware complexity 3.2 MULTIPLICATION AND DIVISION3.2.1 Signed vs. Unsigned Multiplication3.2.2 Shifting Instead of Multiplying or Dividing by Powers of 23.2.3 Multiplying by an Arbitrary Constant3.2.4 Dividing by an Arbitrary Constant3.3 ARITHMETIC FOR FIXED-POINT REALS3.3.1 Fixed-Point Using a Universal 16.16 Format3.3.2 Fixed-Point Using a Universal 32.32 Format3.3.3 Multiplication of 32.32 Fixed Point Reals3.3.4 Example: Multiplying two 4.4 Fixed Point RealsPROBLEMS4 Getting the Most Out of C 4.1 Integer Data Types4.1.1 Integer Range and the Standard Header File LIMITS.H4.2 BOOLEAN Data Types4.3 Mixing Data Types4.4 Manipulating Bits in Memory4.4.1 Testing Bits4.4.2 Setting, Clearing, and Inverting Bits4.4.3 Extracting Bits4.4.4 Inserting Bits4.5 Manipulating Bits in INPUT/OUTPUT PORTS4.5.1 Write-Only I/O Devices4.5.2 I/O Devices Differentiated by Reads Versus Writes4.5.3 I/O Devices Differentiated by Sequential Access4.5.4 I/O Devices Differentiated by Bits in the Written Data4.6 Accessing Memory-Mapped I/O Devices4.6.1 Accessing Data Using a Pointer4.6.2 Arrays, Pointers, and the “Address of” Operator4.7 Structures4.7.1 Packed Structures4.7.2 Bit Fields4.8 Variant Access4.8.1 Casting the Address of an Object4.8.2 Using UnionsProblems5 Programming in AssemblyPart 1: Computer Organization 5.1 Memory5.1.1 Data Alignment5.2 The Central Processing Unit (CPU)5.2.1 Other Registers5.2.2 The Fetch-Execute Cycle5.3 Input/Output (I/O)5.4 Introduction to the ARM® CortexTM- M3 V7M Architecture5.4.1 Internal Organization5.4.2 Instruction Pipelining5.4.3 Memory Model5.4.4 Bit-Banding5.5 ARM ASSEMBLY LANGUAGE5.5.1 Instruction Formats and Operands5.5.2 Translating Assembly into BinaryProblems6 Programming in Assembly Part 2: Data Manipulation6.1 LOADING CONSTANTS INTO REGISTERS6.2 LOADING MEMORY DATA INTO REGISTERS6.3 STORING DATA FROM REGISTERS TO MEMORY6.4 CONVERTING SIMPLE C ASSIGNMENT STATEMENTS INTO ARM ASSEMBLY6.5 MEMORY ADDRESS CALCULATIONS6.6 MEMORY ADDRESSING EXAMPLES6.6.1 Translating C Pointer Expressions to Assembly6.6.2 Translating C Subscript Expressions to Assembly6.6.3 Translating Structure References to Assembly6.7 STACK INSTRUCTIONS6.8 DATA PROCESSING INSTRUCTIONS6.8.1 Updating the Flags in the APSR6.8.2 Arithmetic Instructions6.8.3 Bit Manipulation Instructions6.8.4 Shift Instructions6.8.5 Bitfield Manipulation Instructions6.8.6 Miscellaneous Bit, Byte and Halfword InstructionsPROBLEMS7 Programming in AssemblyPart 3: Control Structures7.1 INSTRUCTION SEQUENCING7.2 IMPLEMENTING DECISIONS7.2.1 Conditional Branch Instructions7.2.2 If-Then and If-Then-Else Statements7.2.3 Compound Conditionals7.1.4 The “If-Then” (IT) Instruction7.2 IMPLEMENTING LOOPS7.2.1 Speeding Up Array Access7.3 IMPLEMENTING FUNCTIONS7.3.1 Function Call and Return7.3.2 Register Usage7.3.3 Parameter Passing7.3.4 Return Values7.3.5 Temporary Variables7.3.6 Preserving RegistersPROBLEMS8 Programming in AssemblyPart 4: I/O Programming8.1 THE CORTEX-M3 I/O HARDWARE8.1.1 Interrupts and Exceptions8.1.2 Thread and Handler Modes8.1.3 Entering the Exception Handler8.1.4 Returning from the Exception Handler8.1.5 Latency Reduction8.1.6 Priorities and Nested Exceptions8.2 SYNCHRONIZATION, TRANSFER RATE, AND LATENCY8.3 BUFFERS AND QUEUES8.3.1 Double Buffering8.4 ESTIMATING I/O PERFORMANCE CAPABILITY8.4.1 Polled Waiting Loops8.4.2 Interrupt-Driven I/O8.4.3 Direct Memory Access8.4.4 Comparison of MethodsPROBLEMS9 Concurrent Software9.1 FOREGROUND/BACKGROUND SYSTEMS9.1.1 Thread State and Serialization9.1.2 Managing Latency9.1.3 Interrupt Overrun9.1.4 Moving Work into the Background9.2 MULTI-THREADED PROGRAMMING9.2.1 Concurrent Execution of Independent Threads9.2.2 Context Switching9.2.3 Non-preemptive (Cooperative) Multithreading9.2.4 Preemptive Multithreading9.3 SHARED RESOURCES AND CRITICAL SECTIONS9.3.1 Disabling Interrupts9.3.2 Disabling Task Switching9.3.3 Spin Locks9.3.4 Mutex Objects9.3.5 SemaphoresPROBLEMS10 Scheduling10.1 THREAD STATES10.2 PENDING THREADS10.3 CONTEXT SWITCHING10.4 ROUND-ROBIN SCHEDULING10.5 PRIORITY-BASED SCHEDULING10.5.1 Resource Starvation10.5.2 Priority Inversion10.5.3 The Priority Ceiling Protocol10.5.4 The Priority Inheritance Protocol10.6 ASSIGNING PRIORITIES10.6.1 Deadline-Driven Scheduling10.6.2 Rate-Monotonic Scheduling10.7 DEADLOCK10.8 WATCHDOG TIMERSPROBLEMS 11 Memory Management11.1 OBJECTS IN C11.2 SCOPE11.2.1 Refining Local Scope11.2.2 Refining Global Scope11.3 LIFETIME11.4 AUTOMATIC ALLOCATION11.4.1 Storage Class “Register”11.5 STATIC ALLOCATION11.6 THREE PROGRAMS TO DISTINGUISH STATIC FROM AUTOMATIC11.6.1 Object Creation11.6.2 Object Initialization11.6.3 Object Destruction11.7 DYNAMIC ALLOCATION11.7.1 Fragmentation11.7.2 Memory Allocation Pools11.8 AUTOMATIC ALLOCATION WITH VARIABLE SIZE (alloca)11.8.1 Variable-Size Arrays11.9 RECURSIVE FUNCTIONS AND MEMORY ALLOCATIONPROBLEMS12 Shared Memory12.1 RECOGNIZING SHARED OBJECTS12.2 REENTRANT FUNCTIONS12.3 READ-ONLY DATA12.3.1 Type Qualifier "const"12.4 CODING PRACTICES TO AVOID12.4.1 Functions That Keep Internal State in Local Static Objects12.4.2 Functions That Return the Address of a Local Static Object12.5 ACCESSING SHARED MEMORY12.5.1 The Effect of Processor Architecture12.5.2 Read-Only and Write-Only Access12.5.3 Type Qualifier “volatile”PROBLEMS13 System Initialization13.1 MEMORY LAYOUT13.2 THE CPU AND VECTOR TABLE13.3 C RUN-TIME ENVIRONMENT13.3.1 Copying Initial Values from Non-Volatile Memory into the Data Region13.3.2 Zeroing Uninitialized Statics13.3.3 Setting Up a Heap13.4 SYSTEM TIMER13.5 OTHER PERIPHERAL DEVICES