Advanced Signal Integrity for High-Speed Digital Designs

Inbunden, Engelska, 2009

2 299 kr

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A synergistic approach to signal integrity for high-speed digital design This book is designed to provide contemporary readers with an understanding of the emerging high-speed signal integrity issues that are creating roadblocks in digital design. Written by the foremost experts on the subject, it leverages concepts and techniques from non-related fields such as applied physics and microwave engineering and applies them to high-speed digital design—creating the optimal combination between theory and practical applications.Following an introduction to the importance of signal integrity, chapter coverage includes: Electromagnetic fundamentals for signal integrityTransmission line fundamentalsCrosstalkNon-ideal conductor models, including surface roughness and frequency-dependent inductanceFrequency-dependent properties of dielectricsDifferential signalingMathematical requirements of physical channelsS-parameters for digital engineersNon-ideal return paths and via resonanceI/O circuits and modelsEqualizationModeling and budgeting of timing jitter and noiseSystem analysis using response surface modelingEach chapter includes many figures and numerous examples to help readers relate the concepts to everyday design and concludes with problems for readers to test their understanding of the material. Advanced Signal Integrity for High-Speed Digital Designs is suitable as a textbook for graduate-level courses on signal integrity, for programs taught in industry for professional engineers, and as a reference for the high-speed digital designer.

Produktinformation

Utgivningsdatum2009-04-03
Mått164 x 234 x 37 mm
Vikt1 046 g
FormatInbunden
SpråkEngelska
SerieIEEE Press
Antal sidor688
FörlagJohn Wiley & Sons Inc
ISBN9780470192351

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Elektronik och kommunikationer inom Naturvetenskap och teknik

STEPHEN H. HALL is a Senior Staff Engineer at Intel Corporation, where he leads a team focused on the research of new modeling and measurement solutions for channel speeds as high as 30Gb/sec. Previously at Intel, he was the lead designer for desktop and server buses on Pentium II, III, and IV based systems, coordinated research in the area of high-speed signaling with multiple universities, led research and development teams in the area of high-speed modeling, and taught signal integrity courses to engineers in two countries. He is also the author of High-Speed Digital System Design (Wiley). HOWARD L. HECK is a Principal Engineer at Intel Corporation, where he leads development of the signaling specifications and solutions for USB 3.0. He also teaches high-speed digital interconnect design at the Oregon Graduate Institute, is a Senior Member of the IEEE, and holds five patents in the area of high-performance packaging and interconnects, with five more pending.

Preface xv1. Introduction: The Importance of Signal Integrity 11.1 Computing Power: Past and Future 11.2 The Problem 41.3 The Basics 51.4 A New Realm of Bus Design 71.5 Scope of the Book 71.6 Summary 8References 82. Electromagnetic Fundamentals for Signal Integrity 92.1 Maxwell’s Equations 102.2 Common Vector Operators 132.2.1 Vector 132.2.2 Dot Product 132.2.3 Cross Product 142.2.4 Vector and Scalar Fields 152.2.5 Flux 152.2.6 Gradient 182.2.7 Divergence 182.2.8 Curl 202.3 Wave Propagation 232.3.1 Wave Equation 232.3.2 Relation Between E and H and the Transverse Electromagnetic Mode 252.3.3 Time-Harmonic Fields 272.3.4 Propagation of Time-Harmonic Plane Waves 282.4 Electrostatics 322.4.1 Electrostatic Scalar Potential in Terms of an Electric Field 362.4.2 Energy in an Electric Field 372.4.3 Capacitance 402.4.4 Energy Stored in a Capacitor 412.5 Magnetostatics 422.5.1 Magnetic Vector Potential 462.5.2 Inductance 482.5.3 Energy in a Magnetic Field 512.6 Power Flow and the Poynting Vector 532.6.1 Time-Averaged Values 562.7 Reflections of Electromagnetic Waves 572.7.1 Plane Wave Incident on a Perfect Conductor 572.7.2 Plane Wave Incident on a Lossless Dielectric 60References 62Problems 623. Ideal Transmission-Line Fundamentals 653.1 Transmission-Line Structures 663.2 Wave Propagation on Loss-Free Transmission Lines 673.2.1 Electric and Magnetic Fields on a Transmission Line 683.2.2 Telegrapher’s Equations 733.2.3 Equivalent Circuit for the Loss-Free Case 763.2.4 Wave Equation in Terms of LC 803.3 Transmission-Line Properties 823.3.1 Transmission-Line Phase Velocity 823.3.2 Transmission-Line Characteristic Impedance 823.3.3 Effective Dielectric Permittivity 833.3.4 Simple Formulas for Calculating the Characteristic Impedance 853.3.5 Validity of the TEM Approximation 863.4 Transmission-Line Parameters for the Loss-Free Case 903.4.1 Laplace and Poisson Equations 913.4.2 Transmission-Line Parameters for a Coaxial Line 913.4.3 Transmission-Line Parameters for a Microstrip 943.4.4 Charge Distribution Near a Conductor Edge 1003.4.5 Charge Distribution and Transmission-Line Parameters 1043.4.6 Field Mapping 1073.5 Transmission-Line Reflections 1133.5.1 Transmission-Line Reflection and Transmission Coefficient 1133.5.2 Launching an Initial Wave 1163.5.3 Multiple Reflections 1163.5.4 Lattice Diagrams and Over- or Underdriven Transmission Lines 1183.5.5 Lattice Diagrams for Nonideal Topologies 1213.5.6 Effect of Rise and Fall Times on Reflections 1293.5.7 Reflections from Reactive Loads 1293.6 Time-Domain Reflectometry 1343.6.1 Measuring the Characteristic Impedance and Delay of a Transmission Line 1343.6.2 Measuring Inductance and Capacitance of Reactive Structures 1373.6.3 Understanding the TDR Profile 140References 140Problems 1414. Crosstalk 1454.1 Mutual Inductance and Capacitance 1464.1.1 Mutual Inductance 1474.1.2 Mutual Capacitance 1494.1.3 Field Solvers 1524.2 Coupled Wave Equations 1534.2.1 Wave Equation Revisited 1534.2.2 Coupled Wave Equations 1554.3 Coupled Line Analysis 1574.3.1 Impedance and Velocity 1574.3.2 Coupled Noise 1654.4 Modal Analysis 1774.4.1 Modal Decomposition 1784.4.2 Modal Impedance and Velocity 1804.4.3 Reconstructing the Signal 1804.4.4 Modal Analysis 1814.4.5 Modal Analysis of Lossy Lines 1924.5 Crosstalk Minimization 1934.6 Summary 194References 195Problems 1955. Nonideal Conductor Models 2015.1 Signals Propagating in Unbounded Conductive Media 2025.1.1 Propagation Constant for Conductive Media 2025.1.2 Skin Depth 2045.2 Classic Conductor Model for Transmission Lines 2055.2.1 Dc Losses in Conductors 2065.2.2 Frequency-Dependent Resistance in Conductors 2075.2.3 Frequency-Dependent Inductance 2135.2.4 Power Loss in a Smooth Conductor 2185.3 Surface Roughness 2225.3.1 Hammerstad Model 2235.3.2 Hemispherical Model 2285.3.3 Huray Model 2375.3.4 Conclusions 2435.4 Transmission-Line Parameters for Nonideal Conductors 2445.4.1 Equivalent Circuit Impedance and Propagation Constant 2445.4.2 Telegrapher’s Equations for a Real Conductor and a Perfect Dielectric 246References 247Problems 2476. Electrical Properties of Dielectrics 2496.1 Polarization of Dielectrics 2506.1.1 Electronic Polarization 2506.1.2 Orientational (Dipole) Polarization 2536.1.3 Ionic (Molecular) Polarization 2536.1.4 Relative Permittivity 2546.2 Classification of Dielectric Materials 2566.3 Frequency-Dependent Dielectric Behavior 2566.3.1 Dc Dielectric Losses 2576.3.2 Frequency-Dependent Dielectric Model: Single Pole 2576.3.3 Anomalous Dispersion 2616.3.4 Frequency-Dependent Dielectric Model: Multipole 2626.3.5 Infinite-Pole Model 2666.4 Properties of a Physical Dielectric Model 2696.4.1 Relationship Between ε_ and ε__ 2696.4.2 Mathematical Limits 2716.5 Fiber-Weave Effect 2746.5.1 Physical Structure of an FR4 Dielectric and Dielectric Constant Variation 2756.5.2 Mitigation 2766.5.3 Modeling the Fiber-Weave Effect 2776.6 Environmental Variation in Dielectric Behavior 2796.6.1 Environmental Effects on Transmission-Line Performance 2816.6.2 Mitigation 2836.6.3 Modeling the Effect of Relative Humidity on an FR4 Dielectric 2846.7 Transmission-Line Parameters for Lossy Dielectrics and Realistic Conductors 2856.7.1 Equivalent Circuit Impedance and Propagation Constant 2856.7.2 Telegrapher’s Equations for Realistic Conductors and Lossy Dielectrics 291References 292Problems 2927. Differential Signaling 2977.1 Removal of Common-Mode Noise 2997.2 Differential Crosstalk 3007.3 Virtual Reference Plane 3027.4 Propagation of Modal Voltages 3037.5 Common Terminology 3047.6 Drawbacks of Differential Signaling 3057.6.1 Mode Conversion 3057.6.2 Fiber-Weave Effect 310Reference 313Problems 3138. Mathematical Requirements for Physical Channels 3158.1 Frequency-Domain Effects in Time-Domain Simulations 3168.1.1 Linear and Time Invariance 3168.1.2 Time- and Frequency-Domain Equivalencies 3178.1.3 Frequency Spectrum of a Digital Pulse 3218.1.4 System Response 3248.1.5 Single-Bit (Pulse) Response 3278.2 Requirements for a Physical Channel 3318.2.1 Causality 3318.2.2 Passivity 3408.2.3 Stability 343References 345Problems 3459. Network Analysis for Digital Engineers 3479.1 High-Frequency Voltage and Current Waves 3499.1.1 Input Reflection into a Terminated Network 3499.1.2 Input Impedance 3539.2 Network Theory 3549.2.1 Impedance Matrix 3559.2.2 Scattering Matrix 3589.2.3 ABCD Parameters 3829.2.4 Cascading S-Parameters 3909.2.5 Calibration and Deembedding 3959.2.6 Changing the Reference Impedance 3999.2.7 Multimode S-Parameters 4009.3 Properties of Physical S-Parameters 4069.3.1 Passivity 4069.3.2 Reality 4089.3.3 Causality 4089.3.4 Subjective Examination of S-Parameters 410References 413Problems 41310. Topics in High-Speed Channel Modeling 41710.1 Creating a Physical Transmission-Line Model 41810.1.1 Tabular Approach 41810.1.2 Generating a Tabular Dielectric Model 41910.1.3 Generating a Tabular Conductor Model 42010.2 NonIdeal Return Paths 42210.2.1 Path of Least Impedance 42210.2.2 Transmission Line Routed Over a Gap in the Reference Plane 42310.2.3 Summary 43410.3 Vias 43410.3.1 Via Resonance 43410.3.2 Plane Radiation Losses 43710.3.3 Parallel-Plate Waveguide 439References 441Problems 44211. I/O Circuits and Models 44311.1 I/O Design Considerations 44411.2 Push–Pull Transmitters 44611.2.1 Operation 44611.2.2 Linear Models 44811.2.3 Nonlinear Models 45311.2.4 Advanced Design Considerations 45511.3 CMOS receivers 45911.3.1 Operation 45911.3.2 Modeling 46011.3.3 Advanced Design Considerations 46011.4 ESD Protection Circuits 46011.4.1 Operation 46111.4.2 Modeling 46111.4.3 Advanced Design Considerations 46311.5 On-Chip Termination 46311.5.1 Operation 46311.5.2 Modeling 46311.5.3 Advanced Design Considerations 46411.6 Bergeron Diagrams 46511.6.1 Theory and Method 47011.6.2 Limitations 47411.7 Open-Drain Transmitters 47411.7.1 Operation 47411.7.2 Modeling 47611.7.3 Advanced Design Considerations 47611.8 Differential Current-Mode Transmitters 47911.8.1 Operation 47911.8.2 Modeling 48011.8.3 Advanced Design Considerations 48011.9 Low-Swing and Differential Receivers 48111.9.1 Operation 48111.9.2 Modeling 48211.9.3 Advanced Design Considerations 48311.10 IBIS Models 48311.10.1 Model Structure and Development Process 48311.10.2 Generating Model Data 48511.10.3 Differential I/O Models 48811.10.4 Example of an IBIS File 49011.11 Summary 492References 492Problems 49412. Equalization 49912.1 Analysis and Design Background 50012.1.1 Maximum Data Transfer Capacity 50012.1.2 Linear Time-Invariant Systems 50212.1.3 Ideal Versus Practical Interconnects 50612.1.4 Equalization Overview 51112.2 Continuous-Time Linear Equalizers 51312.2.1 Passive CTLEs 51412.2.2 Active CTLEs 52112.3 Discrete Linear Equalizers 52212.3.1 Transmitter Equalization 52512.3.2 Coefficient Selection 53012.3.3 Receiver Equalization 53512.3.4 Nonidealities in DLEs 53612.3.5 Adaptive Equalization 53612.4 Decision Feedback Equalization 54012.5 Summary 542References 545Problems 54613. Modeling and Budgeting of Timing Jitter and Noise 54913.1 Eye Diagram 55013.2 Bit Error Rate 55213.2.1 Worst-Case Analysis 55213.2.2 Bit Error Rate Analysis 55513.3 Jitter Sources and Budgets 56013.3.1 Jitter Types and Sources 56113.3.2 System Jitter Budgets 56813.4 Noise Sources and Budgets 57213.4.1 Noise Sources 57213.4.2 Noise Budgets 57913.5 Peak Distortion Analysis Methods 58313.5.1 Superposition and the Pulse Response 58313.5.2 Worst-Case Bit Patterns and Data Eyes 58513.5.3 Peak Distortion Analysis Including Crosstalk 59413.5.4 Limitations 59813.6 Summary 599References 599Problems 60014. System Analysis Using Response Surface Modeling 60514.1 Model Design Considerations 60614.2 Case Study: 10-Gb/s Differential PCB Interface 60714.3 RSM Construction by Least Squares Fitting 60714.4 Measures of Fit 61514.4.1 Residuals 61514.4.2 Fit Coefficients 61614.5 Significance Testing 61814.5.1 Model Significance: The F-Test 61814.5.2 Parameter Significance: Individual t-Tests 61914.6 Confidence Intervals 62114.7 Sensitivity Analysis and Design Optimization 62314.8 Defect Rate Prediction Using Monte Carlo Simulation 62814.9 Additional RSM Considerations 63314.10 Summary 633References 634Problems 635Appendix A: Useful Formulas Identities Units and Constants 637Appendix B: Four-Port Conversions Between T- and S-Parameters 641Appendix C: Critical Values of the F-Statistic 645Appendix D: Critical Values of the T-Statistic 647Appendix E: Causal Relationship Between Skin Effect Resistance and Internal Inductance for Rough Conductors 649Appendix F: Spice Level 3 Model for 0.25 μm MOSIS Process 653Index 655