Low-Power Digital VLSI Design

This text addresses both process technologies and device modelling. Power dissipation in CMOS circuits, several practical circuit examples and low-power techniques are discussed, and low-voltage issues for digital CMOS and BiCMOS circuits are emphasized. The book also provides an extensive study of advanced CMOS subsystem design. A low-power design methodology is presented with various power minimization techniques at the circuit, logic, architecture and algorithm levels. Features include: low-voltage CMOS device modelling; technology files; design rules; switching activity concept; low-power guidelines to engineering practice; pass-transistor logic families; power dissipation of I/O circuits; multi- and low-VT CMOS logic; static power reduction circuit techniques; state of the art design of low-voltage BiCMOS and CMOS circuits; low-power techniques in CMOS SRAMS and DRAMS; low-power on-chip voltage down converter design; numerous advanced CMOS subsystems (e.g. adders, multipliers, data path, memories, regular structures, phase-locked loops) with several design options; trading power delay and area Low-power design methodology; power estimation techniques; power reduction techniques at the logic; architecture; and algorithm levels.More than 190 circuits are explained at the transistor level.