Investigation of Electrical Properties of(p-n) Junction Porous Silicon

Chapter one presents a brief introduction and enunciates the objectives of our investigations also presents a review of the physics of semiconductor nanostructures. chapter two gives details of the etching process,the techniques employed to porous silicon nanostructures,chapter three describes instruments and devices employed in this work.chapter four we have presented the results and discussions of the surface morphology of the reconstructed surfaces etched by photo-electro chemical etching including details The morphological aspects like: pore width, pore shape and wall thickness between two pores of the prepared porous silicon for the abrupt (p-n) junction samples have been studied by using scanning electron microscopy (SEM). These characteristics are strongly dependent on the preparation conditions and the results with discussion of the electrical properties like, current-voltage characteristics and capacitance-voltage characteristics and other studies for sandwich structures, (Al/p-n junction PSi/Al) at room temperature.